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dc.contributor.authorDíaz, Enrique
dc.contributor.authorFernández, Mikel
dc.contributor.authorKosmidis, Leonidas
dc.contributor.authorMezzetti, Enrico
dc.contributor.authorHernandez, Carles
dc.contributor.authorAbella, Jaume
dc.contributor.authorCazorla, Francisco J.
dc.contributor.otherBarcelona Supercomputing Center
dc.date.accessioned2017-07-28T10:07:20Z
dc.date.available2017-07-28T10:07:20Z
dc.date.issued2017-05-30
dc.identifier.citationDíaz, E. [et al.]. MC2: Multicore and Cache Analysis via Deterministic and Probabilistic Jitter Bounding. A: "Reliable Software Technologies -- Ada-Europe 2017: 22nd Ada-Europe International Conference on Reliable Software Technologies, Vienna, Austria, June 12-16, 2017, Proceedings". Springer International Publishing, 2017, p. 102-118.
dc.identifier.isbn978-3-319-60588-3
dc.identifier.urihttp://hdl.handle.net/2117/107015
dc.description.abstractIn critical domains, reliable software execution is increasingly involving aspects related to the timing dimension. This is due to the advent of high-performance (complex) hardware, used to provide the rising levels of guaranteed performance needed in those domains. Caches and multicores are two of the hardware features that have the potential to significantly reduce WCET estimates, yet they pose new challenges on current-practice measurement-based timing analysis (MBTA) approaches. In this paper we propose MC2, a technique for multilevel-cache multicores that combines deterministic and probabilistic jitter-bounding approaches to reliably handle both the variability in execution time generated by caches and the contention in accessing shared hardware resources. We evaluate MC2 on a COTS quad-core LEON-based board and our initial results show how it effectively captures cache and multicore contention in pWCET estimates with respect to actual observed values.
dc.description.sponsorshipThis work has been partially supported by the Spanish Ministry of Economy and Competitiveness (MINECO) under grant TIN2015-65316-P and the HiPEAC Network of Excellence. Jaume Abella has been partially supported by the MINECO under Ramon y Cajal postdoctoral fellowship number RYC-2013-14717. Carles Hernández is jointly funded by the MINECO and FEDER funds through grant TIN2014-60404-JIN.
dc.format.extent17 p.
dc.language.isoeng
dc.publisherSpringer International Publishing
dc.rightsAttribution-NonCommercial-NoDerivs 3.0 Spain
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/3.0/es/
dc.subjectÀrees temàtiques de la UPC::Enginyeria elèctrica
dc.subject.lcshProbabilistic database systems
dc.subject.lcshCache memory
dc.subject.lcshEmbedded computer systems
dc.subject.otherWCET
dc.subject.otherMBTA
dc.subject.otherMulticore contention
dc.subject.otherProbabilistic timing analysis
dc.subject.otherJitter bounding
dc.titleMC2: Multicore and Cache Analysis via Deterministic and Probabilistic Jitter Bounding
dc.typeConference lecture
dc.subject.lemacSupercomputadors
dc.subject.lemacSistemes incrustats (Informàtica)
dc.identifier.doi10.1007/978-3-319-60588-3_7
dc.description.peerreviewedPeer Reviewed
dc.relation.publisherversionhttps://link.springer.com/chapter/10.1007/978-3-319-60588-3_7
dc.rights.accessOpen Access
dc.description.versionPostprint (author's final draft)
dc.relation.projectidinfo:eu-repo/grantAgreement/MINECO/1PE/TIN2015-65316-P
dc.relation.projectidinfo:eu-repo/grantAgreement/MINECO/1PE/TIN2014-60404-JIN
dc.relation.projectidinfo:eu-repo/grantAgreement/MINECO/1PE/RYC-2013-14717
upcommons.citation.publishedtrue
upcommons.citation.publicationNameReliable Software Technologies -- Ada-Europe 2017: 22nd Ada-Europe International Conference on Reliable Software Technologies, Vienna, Austria, June 12-16, 2017, Proceedings
upcommons.citation.startingPage102
upcommons.citation.endingPage118


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