Monitor strategies for variability reduction considering correlation between power and timing variability

Abstract

As CMOS technology scales, Process, Voltage and Temperature (PVT) variations have an increasing impact on, performance and power consumption of the electronic devices. Variability causes an undesirable dispersion of performance parameters and a consequent reduction in parametric yield. Monitor and control techniques based on BB and VS can be used to reduce variability. This paper aims to determine which type of sensor provides a better overall variability reduction by taking into account the correlation between different performance magnitudes: static power, dynamic power and delay.