Ponències/Comunicacions de congressos
Enviaments recents
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VCO phase noise and sideband spurs due to substrate noise generated by on-chip digital circuits
(Institute of Electrical and Electronics Engineers (IEEE), 2006)
Text en actes de congrés
Accés obertThis paper presents the effects of noise generated by realistic digital circuits on RF voltage controlled oscillators (VCO) integrated in the same silicon die. The digital noise is coupled through the common substrate and ... -
Frequency characterization of a 2.4 GHz CMOS LNA by Thermal Measurements
(Institute of Electrical and Electronics Engineers (IEEE), 2006)
Text en actes de congrés
Accés obertThis paper presents a technique to obtain electrical characteristics of analog and RF circuits, based on measuring temperature at the silicon surface close to the circuit under test. Experimental results validate the ... -
Using temperature as observable of the frequency response of RF CMOS amplifiers
(Institute of Electrical and Electronics Engineers (IEEE), 2008)
Text en actes de congrés
Accés obertThe power dissipated by the devices of an integrated circuit can be considered a signature of the circuit's performance. Without disturbing the circuit operation, this power consumption can be monitored by temperature ... -
A low-power RF front-end for 2.5 GHz receivers
(Institute of Electrical and Electronics Engineers (IEEE), 2008)
Text en actes de congrés
Accés obertThis paper presents a low power and low cost front end for a direct conversion 2.5 GHz ISM band receiver composed of a 16 kV HBM ESD protected LNA, differential Gilbert-cell mixers, and high-pass filters for DC offset ... -
An approach to dynamic power consumption current testing of CMOS ICs
(Institute of Electrical and Electronics Engineers (IEEE), 1995)
Text en actes de congrés
Accés obertI/sub DDQ/ testing is a powerful strategy for detecting defects that do not alter the logic behavior of CMOS ICs. Such a technique is very effective especially in the detection of bridging defects although some opens can ... -
Implementation of a 5x5 trits multiplier in a quasi-adiabatic ternary CMOS logic
(Institute of Electrical and Electronics Engineers (IEEE), 1997)
Text en actes de congrés
Accés obertAdiabatic switching is one technique to design low power digital IC. In order to diminish its expensive silicon area requirements an adiabatic ternary logic is proposed. A 5×5 trits (ternary signals) multiplier has been ... -
Analysis of ISSQ/IDDQ testing implementation and circuit partitioning in CMOS cell-based design
(Institute of Electrical and Electronics Engineers (IEEE), 1996)
Text en actes de congrés
Accés obertDifference between ISSQ and IDDQ testing strategies is presented, discussing the dependency of area overhead and sensing speed on the technology. The current sensor implementation style suitable for cell-based design ... -
Characterization of the substrate noise spectrum for mixed-signal ICs
(Institute of Electrical and Electronics Engineers (IEEE), 2005)
Text en actes de congrés
Accés obertThis paper presents a simplified analytical model of the substrate noise generated by digital circuitry that captures the most relevant frequency domain characteristics and relates them with parameters of the digital circuit ... -
Data relevance-aware dynamic sensing technique with battery lifetime guarantee for wireless sensor nodes
(Institute of Electrical and Electronics Engineers (IEEE), 2021)
Text en actes de congrés
Accés restringit per política de l'editorialSignificant effort has been devoted to the development of dynamic monitoring techniques to exploit the temporal correlation among observations with the intention of improving the energy efficiency in wireless sensor nodes. ... -
VIA: A smart scratchpad for vector units with application to sparse matrix computations
(Institute of Electrical and Electronics Engineers (IEEE), 2021)
Text en actes de congrés
Accés obertSparse matrix operations are critical kernels in multiple application domains such as High Performance Computing, artificial intelligence and big data. Vector processing is widely used to improve performance on mathematical ... -
Noise-induced Performance Enhancement of Variability-aware Memristor Networks
(2019)
Text en actes de congrés
Accés restringit per política de l'editorialMemristor networks are capable of low-power, massive parallel processing and information storage. Moreover, they have widely used for a vast number of intelligent data analysis applications targeting mobile edge devices ... -
Experimental investigation of memristance enhancement
(2019)
Text en actes de congrés
Accés restringit per política de l'editorialMemristor devices are two-terminal nanoscale circuit elements that exhibit nonvolatile information storing and can be manufactured in ultra-dense arrays with low-power operation. Although, theoretically, memristors are ...