Recent Submissions

  • VIA: A smart scratchpad for vector units with application to sparse matrix computations 

    Pavón Rivera, Julián; Vargas Valdivieso, Iván; Barredo Ferreira, Adrián; Marimon Illana, Joan; Moreto Planas, Miquel; Moll Echeto, Francisco de Borja; Unsal, Osman Sabri; Valero Cortés, Mateo; Cristal Kestelman, Adrián (Institute of Electrical and Electronics Engineers (IEEE), 2021)
    Conference report
    Open Access
    Sparse matrix operations are critical kernels in multiple application domains such as High Performance Computing, artificial intelligence and big data. Vector processing is widely used to improve performance on mathematical ...
  • Alternative memristor-based interconnect topologies for fast adaptive synchronization of chaotic circuits 

    Escudero López, Manuel; Vourkas, Ioannis; Rubio Sola, Jose Antonio (2020-09)
    Article
    Restricted access - publisher's policy
    Resistive switching devices (memristors) constitute an emerging device technology promising for a vari- ety of applications that are currently being studied. In this context, the use of memristors as coupling el- ements ...
  • Noise-induced Performance Enhancement of Variability-aware Memristor Networks 

    Ntinas, Vasileios; Fyrigos, Iosif; Sirakoulis, Georgios; Rubio Sola, Jose Antonio; Martin Martinez, Javier; Rodriguez, Rosana; Nafría Maqueda, Montserrat (2019)
    Conference report
    Restricted access - publisher's policy
    Memristor networks are capable of low-power, massive parallel processing and information storage. Moreover, they have widely used for a vast number of intelligent data analysis applications targeting mobile edge devices ...
  • Experimental investigation of memristance enhancement 

    Ntinas, Vasileios; Rubio Sola, Jose Antonio; Sirakoulis, Georgios; Rodriguez, Rosana; Nafría Maqueda, Montserrat (2019)
    Conference report
    Restricted access - publisher's policy
    Memristor devices are two-terminal nanoscale circuit elements that exhibit nonvolatile information storing and can be manufactured in ultra-dense arrays with low-power operation. Although, theoretically, memristors are ...
  • Aging in CMOS RF linear power amplifiers: an experimental study 

    Aragonès Cervera, Xavier; Barajas Ojeda, Enrique; Crespo Yepes, Albert; Mateo Peña, Diego; Rodríguez Martínez, Rosana; Martin Martínez, Javier; Nafría Maqueda, Montserrat (IEEE Microwave Theory and Techniques Society, 2021-02-01)
    Article
    Restricted access - publisher's policy
    An extensive experimental analysis of the hot carrier injection (HCI) and bias temperature instability (BTI) aging effects on RF linear power amplifiers (PAs) is presented in this article. Two different 2.45-GHz PA topologies ...
  • Probabilistic resistive switching device modeling based on Markov jump processes 

    Ntinas, Vasileios; Rubio Sola, Jose Antonio; Sirakoulis, Georgios (Institute of Electrical and Electronics Engineers (IEEE), 2020-12-02)
    Article
    Open Access
    In this work, a versatile mathematical framework for multi-state probabilistic modeling of Resistive Switching (RS) devices is proposed for the first time. The mathematical formulation of memristor and Markov jump processes ...
  • Power-efficient noise-Induced reduction of ReRAM cell’s temporal variability effects 

    Ntinas, Vasileios; Rubio Sola, Jose Antonio; Sirakoulis, Georgios; Salvador, Emili; Pedro, Marta; Crespo-Yepes, A.; Martin Martinez, Javier; Rodríguez Martínez, Rosana; Nafria, Montserrat (2021-04)
    Article
    Open Access
    Resistive Random Access Memory (ReRAM) is apromising novel memory technology for non-volatile storing, with low-power operation and ultra-high area density. However, ReRAM memories still face issues through commerciali ...
  • Technological layer 

    Rubio Sola, Jose Antonio; Canal Corretger, Ramon (The Institution of Engineering and Technology, 2020-10)
    Part of book or chapter of book
    Restricted access - publisher's policy
    This chapter describes the fundamental characteristics of Complementary Metal-Oxide-Semiconductor (CMOS) technology, and how it can be assessed for system reliability studies. After some definitions, the dominating ...
  • A 250-ps integrated ultra-wideband timed array beamforming receiver in 0.18 um CMOS 

    Aghazadeh Dafsari, Seyed Rasoul; Martínez García, Herminio; Aragonès Cervera, Xavier; Saberkari, Alireza (Institute of Electrical and Electronics Engineers (IEEE), 2020)
    Conference lecture
    Restricted access - publisher's policy
    This paper presents a 4-channel ultra-wideband (UWB) timed array beamforming receiver designed in a standard 0.18-um CMOS technology. The proposed timed array receiver achieves a maximum delay of 250 ps at the maximum beam ...
  • Resistive random access memory variability and its mitigation schemes 

    Pouman, Peyman; Amat Bertran, Esteve; Hamdioui, Said; Rubio Sola, Jose Antonio (2017-03-01)
    Article
    Restricted access - publisher's policy
    The need for design of new computing and storage paradigms has leaded to the emergence of new technologies and procedures. Among these technologies, emerging non-volatile memories such as RRAMs are getting intense attention ...
  • A memristor-based quaternary memory with adaptive noise tolerance 

    Dabaghi Zarandi, Arezoo; Rubio Sola, Jose Antonio; Reza Reshadinezhad, Mohammad (Institute of Electrical and Electronics Engineers (IEEE), 2020)
    Conference report
    Restricted access - publisher's policy
    Considering the constraints of CMOS technology progress at the nano-domain, memristor technology is one of the preferred alternatives to merge with and substitute CMOS-based memory circuits. At the same time to increase ...
  • An academic RISC-V silicon implementation based on open-source components 

    Abella Ferrer, Jaume; Bulla, Calvin; Cabo Pitarch, Guillem; Cazorla Almeida, Francisco Javier; Cristal Kestelman, Adrián; Doblas Font, Max; Figueras Bagué, Roger; González Trejo, Alberto; Hernández Luz, Carles; Hernández Calderón, César Alejandro; Jiménez Arador, Víctor; Kosmidis, Leonidas; Kostalabros, Ioannis-Vatistas; Langarita Benítez, Rubén; Leyva Santes, Neiel; López Paradís, Guillem; Marimon Illana, Joan; Martínez Martínez, Ricardo; Mendoza Escobar, Jonnatan; Moll Echeto, Francisco de Borja; Moreto Planas, Miquel; Pavón Rivera, Julián; Ramírez Lazo, Cristóbal; Ramírez Salinas, Marco Antonio; Rojas Morales, Carlos; Rubio Sola, Jose Antonio; Ruiz, Abraham Josafat; Sonmez, Nehir; Soria Pardos, Víctor; Teres Teres, Lluis; Unsal, Osman Sabri; Valero Cortés, Mateo; Vargas Valdivieso, Iván; Villa Vargas, Luis Alfonso (Institute of Electrical and Electronics Engineers (IEEE), 2020)
    Conference report
    Open Access
    The design presented in this paper, called preDRAC, is a RISC-V general purpose processor capable of booting Linux jointly developed by BSC, CIC-IPN, IMB-CNM (CSIC), and UPC. The preDRAC processor is the first RISC-V ...

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