An enegy-efficient FPGA accelerator for convolutional neural networks

Delgado Ventosa, Berta

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Delgado Ventosa, Berta

Tutor / directorGonzález Colás, Antonio María

; Arnau Montañés, José María

Document typeMaster thesis

Date2018-10-25

Rights accessOpen Access

All rights reserved. This work is protected by the corresponding intellectual and industrial property rights. Without prejudice to any existing legal exemptions, reproduction, distribution, public communication or transformation of this work are prohibited without permission of the copyright holder

Abstract

This project focuses on a state-of-the-art DNN specifically build for image clas sification. We develop a new architecture design that will run on an experimental Intel accelerator platform called HARP. We obtain low-power solution and evaluate the possibilities and requierements of HARPplatform.

SubjectsNeural networks (Computer science), Energy consumption, Xarxes neuronals (Informàtica), Energia -- Consum

DegreeMÀSTER UNIVERSITARI EN INNOVACIÓ I RECERCA EN INFORMÀTICA (Pla 2012)

URIhttp://hdl.handle.net/2117/127544

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Màsters oficials - Master in Innovation and Research in Informatics - MIRI [411]

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An enegy-efficient FPGA accelerator for convolutional neural networks

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