Exploració per autor "Rubio Sola, Jose Antonio"
Ara es mostren els items 156-175 de 175
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Tcmos: low noise power supply technique for digital ics
(1995-08)
Article
Accés obertMixed signal circuits have become an important trend in IC design. In these circuits, the effect of digital noise on the analogue part of the circuit is one of the most important performance constraints. The authors ... -
Technological layer
(The Institution of Engineering and Technology, 2020-10)
Capítol de llibre
Accés restringit per política de l'editorialThis chapter describes the fundamental characteristics of Complementary Metal-Oxide-Semiconductor (CMOS) technology, and how it can be assessed for system reliability studies. After some definitions, the dominating ... -
Temperature sensors and measurements to test analogue circuits: questions and answers
(Institute of Electrical and Electronics Engineers (IEEE), 2016)
Text en actes de congrés
Accés restringit per política de l'editorialWe have been working in the field of temperature sensors and temperature measurements to test analogue circuits during the past 10 years. As we have presented different works in many conferences, we have collected many ... -
Toward designing high-speed cost-efficient quantum reversible carry select adders
(Institute of Electrical and Electronics Engineers (IEEE), 2023)
Article
Accés obertCompared to classical computing implementations, reversible arithmetic adders offer a valuable platform for implementing quantum computation models in digital systems and specific applications, such as cryptography and ... -
TRAMS Project: variability and reliability of SRAM memories in sub-22nm bulk-CMOS technologies
(Elsevier, 2011-12-22)
Article
Accés restringit per política de l'editorialThe TRAMS (Terascale Reliable Adaptive MEMORY Systems) project addresses in an evolutionary way the ultimate CMOS scaling technologies and paves the way for revolutionary, most promising beyond-CMOS technologies. In this ... -
Turtle Logic: A new probabilistic design methodology of nanoscale digital circuits
(IEEE Press. Institute of Electrical and Electronics Engineers, 2010)
Text en actes de congrés
Accés obertAs devices and operating voltages are scaled down, future circuits will be plagued by higher soft error rates, reduced noise margins and defective devices. A key challenge for the future technologies is to retain circuit ... -
Turtle logic: Novel IC digital probabilistic design methodology
(2010)
Text en actes de congrés
Accés obertFuture electronic devices are expected to operate at lower voltage supply to save power, especially in ultimate and new technologies. The resulting reduction of logic levels approaches the thermal noise limit, and ... -
Two examples of approximate arithmetic to reduce hardware complexity and power consumption
(Institute of Electrical and Electronics Engineers (IEEE), 2022)
Comunicació de congrés
Accés obertAs the end of Moore's Law approaches, electronic system designers must find ways to keep up with the ever increasing computational demands of the modern era. Some computationally intensive applications, such as multimedia ... -
Using current to drive two SDC memristors connected in series and in anti-series
(Institute of Electrical and Electronics Engineers (IEEE), 2023)
Text en actes de congrés
Accés obertNetworks of bipolar memristors have a rich collective switching behavior, which can be exploited in computing applications. Such a small network is formed by a pair of bipolar memristors connected in a series or anti-series ... -
Using temperature as observable of the frequency response of RF CMOS amplifiers
(Institute of Electrical and Electronics Engineers (IEEE), 2008)
Text en actes de congrés
Accés obertThe power dissipated by the devices of an integrated circuit can be considered a signature of the circuit's performance. Without disturbing the circuit operation, this power consumption can be monitored by temperature ... -
Variability and reliability analysis of CNFET in the presence of carbon nanotube density fluctuation
(IEEE Press. Institute of Electrical and Electronics Engineers, 2012)
Text en actes de congrés
Accés restringit per política de l'editorialCurrent carbon nanotube (CNT) synthesis processes are not perfect. One of the most critical issue is the presence of density variations in CNT growth. These variations are due to the lack of precise control of CNT location ... -
Variability and reliability analysis of CNFET technology: Impact of manufacturing imperfections
(2015-02-01)
Article
Accés obertCarbon nanotube field-effect transistors (CNFETs) are promising candidates to substitute silicon transistors. Boasting extraordinary electronic properties, CNFETs exhibit characteristics rivaling those of state-of-the-art ... -
Variability impact on on-chip memory data paths
(2014)
Comunicació de congrés
Accés obertProcess variations have a large impact on device and circuit reliability and performance. Few studies are focused on their impact on more complex systems, as for example their influence in a data path. In our study, the ... -
Variability-tolerant memristor-based ratioed logic in crossbar array
(Institute of Electrical and Electronics Engineers (IEEE), 2018)
Text en actes de congrés
Accés obertThe advent of the first TiO2-based memristor in 2008 revived the scientific interest both from academia and industry for this de- vice technology, with several emerging applications including that of logic circuits. Several ... -
VCTA: A Via-Configurable Transistor Array regular fabric
(IEEE Computer Society Publications, 2010)
Text en actes de congrés
Accés obertLayout regularity is introduced progressively by integrated circuit manufacturers to reduce the increasing systematic process variations in the deep sub-micron era. In this paper we focus on a scenario where layout regularity ... -
Via-configurable transistors array: a regular design technique to improve ICs yield
(Institute of Electrical and Electronics Engineers (IEEE), 2007)
Text en actes de congrés
Accés obertProcess variations are a major bottleneck for digital CMOS integrated circuits manufacturability and yield. That is why regular techniques with different degrees of regularity are emerging as possible solutions. Our ... -
Voltage divider for self-limited analog state programing of memristors
(2019-06-19)
Article
Accés obertResistive switching devices - memristors - present a tunable, incremental switching behavior. Tuning their state accurately, repeatedly and in a wide range, makes memristors well-suited for multi-level (ML) resistive memory ... -
Voltage fluctuations in IC power supply distribution
(2007-11)
Text en actes de congrés
Accés obertThe supply voltage decrease and power consumption increase of modern ICs made the requirements for low voltage fluctuation caused by packaging and on-chip parasitic impedances more difficult to achieve. Most of the research ... -
vPROBE: Variation aware post-silicon power/performance binning using embedded 3T1D cells
(2010-09-05)
Report de recerca
Accés obertIn this paper, we present an on-die post-silicon binning methodology that takes into account the effect of static and dynamic variations and categorizes every processor based on power/performance.The proposed scheme is ... -
Wave computing with passive memristive networks
(Institute of Electrical and Electronics Engineers (IEEE), 2019)
Text en actes de congrés
Accés obertSince CMOS technology approaches its physical limits, the spotlight of computing technologies and architectures shifts to unconventional computing approaches. In this area, novel computing systems, inspired by natural and ...
