Future electronic devices are expected to operate at lower voltage supply to save power, especially in ultimate and new technologies. The resulting reduction
of logic levels approaches the thermal noise limit, and consequently signal to noise margins are reduced, exposing computations to higher soft-error rates. In other words, the future circuits will be in a scenario
where all devices may fail due to soft-error produced by trend of low SNR.
In order to design reliable circuits with unreliable components, novel design techniques have been introduced. The problem of designing reliable systems with unreliable components traces back to Von
Neumann, who proposed the N-tuple Modular
Redundancy (NMR) technique. Additional proposals have appeared in the literature addressing the problem from the point of view of noise tolerance. For instance,
the approach based on Markov Random Field theory (MRF). Take in account the Hamming distance for build basic logic gates focus to high noise and low voltage scenarios.
Therefore, our proposal is based on the assumption that the devices in new and future technologies will be not perfect, noisy and hence they might fail.
CitationGarcía, L. [et al.]. Turtle logic: Novel IC digital probabilistic design methodology. A: Barcelona Forum on Ph.D. Research in Communications, Electronics and Signal Processing. "2nd Barcelona Forum on Ph.D. Research in Communications, Electronics and Signal Processing". Barcelona: 2010, p. 15-16.
All rights reserved. This work is protected by the corresponding intellectual and industrial property rights. Without prejudice to any existing legal exemptions, reproduction, distribution, public communication or transformation of this work are prohibited without permission of the copyright holder. If you wish to make any use of the work not provided for in the law, please contact: firstname.lastname@example.org