Exploració per autor "Machado, Lucas"

Ara es mostren els items 1-7 de 7

    • Boolean decomposition for AIG optimization 

      Machado, Lucas; Cortadella, Jordi (Association for Computing Machinery (ACM), 2017)
      Text en actes de congrés
      Accés obert
      Restructuring techniques for And-Inverter Graphs (AIG), such as rewriting and refactoring, are powerful, scalable and fast, achieving highly optimized AIGs after few iterations. However, these techniques are biased by the ...

    • Increasing the robustness of digital circuits with ring oscillator clocks 

      Machado, Lucas; Roca Pérez, Antoni; Cortadella, Jordi (2017)
      Text en actes de congrés
      Accés obert
      Technology scaling enables lower supply voltages, but also increases power density of integrated circuits. In this context, power integrity becomes a major concern in the implementation of highperformance designs. This ...

    • Logic decomposition and adaptive clocking for the optimization of digital circuits 

      Machado, Lucas (Universitat Politècnica de Catalunya, 2019-02-21)
      Tesi
      Accés obert
      Over the course of 60 years, since the invention of the integrated circuit (IC), exponential improvements in cost, performance and power consumption were observed. Such advances have been strongly linked with the continuous ...

    • Logic synthesis for manufacturability considering regularity and lithography printability 

      Machado, Lucas; Dal Bem, Vinicius; Moll Echeto, Francisco de Borja; Gómez Fernández, Sergio; Ribas, Renato P.; Reis, André Inácio (IEEE Computer Society Publications, 2013)
      Text en actes de congrés
      Accés restringit per política de l'editorial
      This paper presents a novel yield model for integrated circuits manufacturing, considering lithography printability problems as a source of yield loss. The use of regular layouts can improve the printability of IC layouts, ...

    • Robustness to voltage noise with ring oscillator clocks 

      Machado, Lucas; Roca Pérez, Antoni; Cortadella, Jordi (2019-04)
      Article
      Accés obert
      Voltage noise is the main source of dynamic variability in integrated circuits and a major concern for the design of power delivery networks (PDNs). Lower supply voltages were made possible with technology scaling, but ...

    • Support-reducing decomposition for FPGA mapping 

      Machado, Lucas; Cortadella, Jordi (2020-01)
      Article
      Accés obert
      Decomposition is a technology-independent process, in which a large complex function is broken into smaller, less complex functions. The costs of two-level or factored-form representations (cubes and literals) are used in ...

    • Voltage noise analysis with ring oscillator clocks 

      Machado, Lucas; Roca Pérez, Antoni; Cortadella, Jordi (Institute of Electrical and Electronics Engineers (IEEE), 2017)
      Text en actes de congrés
      Accés obert
      Voltage noise is the main source of dynamic variability in integrated circuits and a major concern for the design of Power Delivery Networks (PDNs). Ring Oscillators Clocks (ROCs) have been proposed as an alternative to ...