Now showing items 1-4 of 4

    • Parallelizing general histogram application for CUDA architectures 

      Milic, Ugljesa; Gelado Fernandez, Isaac; Puzovic, Nikola; Ramírez Bellido, Alejandro; Tomasevic, Milo (IEEE Computational Intelligence Society, 2013)
      Conference report
      Restricted access - publisher's policy
      Histogramming is a tool commonly used in data analysis. Although its serial version is simple to implement, providing an efficient and scalable way to parallelize it can be challenging. This especially holds in case of ...
    • Rebalancing the core front-end through HPC code analysis 

      Milic, Ugljesa; Carpenter, Paul Matthew; Rico, Alejandro; Ramirez, Alex (IEEE, 2016-09-25)
      Conference lecture
      Open Access
      There is a need to increase performance under the same power and area envelope to achieve Exascale technology in high performance computing (HPC). The today's chip multiprocessor (CMP) design is tailored by traditional ...
    • Rebalancing the core front-end through HPC code analysis 

      Milic, Ugljesa; Carpenter, Paul Matthew; Rico, Alejandro; Ramirez, Alex (IEEE, 2016-10-10)
      Conference report
      Open Access
      There is a need to increase performance under the same power and area envelope to achieve Exascale technology in high performance computing (HPC). The today's chip multiprocessor (CMP) design is tailored by traditional ...
    • Sharing the instruction cache among lean cores on an asymmetric CMP for HPC applications 

      Milic, Ugljesa; Rico, Alejandro; Carpenter, Paul Matthew; Ramirez, Alex (Institute of Electrical and Electronics Engineers (IEEE), 2017-07-13)
      Conference lecture
      Open Access
      High performance computing (HPC) applications have parallel code sections that must scale to large numbers of cores, which makes them sensitive to serial regions. Current supercomputing systems with heterogeneous or ...