Exploració per autor "Moretó Planas, Miquel"
Ara es mostren els items 112-129 de 129
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Task mapping in rectangular twisted tori
Camarero Coterillo, Cristobal; Vallejo, Enrique; Martínez Fernández, Maria del Carmen; Moretó Planas, Miquel; Beivide Palacio, Julio Ramón (Association for Computing Machinery (ACM), 2013)
Text en actes de congrés
Accés obertTwisted torus topologies have been proposed as an alternative to toroidal rectangular networks, improving distance parameters and providing network symmetry. However, twisting is apparently less amenable to task mapping ... -
Task scheduling techniques for asymmetric multi-core systems
Chronaki, Kallia; Rico, Alejandro; Casas, Marc; Moretó Planas, Miquel; Badia Sala, Rosa Maria; Ayguadé Parra, Eduard; Labarta Mancho, Jesús José; Valero Cortés, Mateo (2017-07-01)
Article
Accés obertAs performance and energy efficiency have become the main challenges for next-generation high-performance computing, asymmetric multi-core architectures can provide solutions to tackle these issues. Parallel programming ... -
TaskGenX: A Hardware-Software Proposal for Accelerating Task Parallelism
Chronaki, Kallia; Casas, Marc; Moretó Planas, Miquel; Bosch Pons, Jaume; Badia Sala, Rosa Maria (Springer, 2018-05-29)
Comunicació de congrés
Accés obertAs chip multi-processors (CMPs) are becoming more and more complex, software solutions such as parallel programming models are attracting a lot of attention. Task-based parallel programming models offer an appealing approach ... -
TaskPoint: sampled simulation of task-based programs
Grass, Thomas Dieter; Rico, Alejandro; Casas, Marc; Moretó Planas, Miquel; Ayguadé Parra, Eduard (Institute of Electrical and Electronics Engineers (IEEE), 2016)
Text en actes de congrés
Accés obertSampled simulation is a mature technique for reducing simulation time of single-threaded programs, but it is not directly applicable to simulation of multi-threaded architectures. Recent multi-threaded sampling techniques ... -
TD-NUCA: runtime driven management of NUCA caches in task dataflow programming models
Caheny, Paul; Álvarez Martí, Lluc; Casas, Marc; Moretó Planas, Miquel (Institute of Electrical and Electronics Engineers (IEEE), 2022)
Text en actes de congrés
Accés obertIn high performance processors, the design of on-chip memory hierarchies is crucial for performance and energy efficiency. Current processors rely on large shared Non-Uniform Cache Architectures (NUCA) to improve performance ... -
Tessellation: Refactoring the OS around explicit resource containers with continuous adaptation
Colmenares, Juan A.; Eads, Gage; Hofmeyry, Steven; Bird, Sarah L.; Moretó Planas, Miquel; Chou, David; Gluzman, Brian; Roman, Eric; Bartolini, Davide B.; Mor, Nitesh; Asanovic, Krste; Kubiatowicz, John D. (2013)
Text en actes de congrés
Accés restringit per política de l'editorialAdaptive Resource-Centric Computing (ARCC) enables a simultaneous mix of high-throughput parallel, real-time, and interactive applications through automatic discovery of the correct mix of resource assignments necessary ... -
The DeepHealth Toolkit: A unified framework to boost biomedical applications
Cancilla, Michele; Canalini, Laura; Bolelli, Federico; Allegretti, Stefano; Carrión Ponz, Salvador; Paredes Palacios, Roberto; Gómez Adrián, Jon A.; Leo, Simone; Piras, Marco Enrico; Pireddu, Luca; Badouh, Asaf; Marco-Sola, Santiago; Álvarez Martí, Lluc; Moretó Planas, Miquel; Grana, Costantino (Institute of Electrical and Electronics Engineers (IEEE), 2021)
Text en actes de congrés
Accés obertGiven the overwhelming impact of machine learning on the last decade, several libraries and frameworks have been developed in recent years to simplify the design and training of neural networks, providing array-based ... -
The international race towards exascale in Europe
Gagliardi, Fabrizio; Moretó Planas, Miquel; Olivieri, Mauro; Valero Cortés, Mateo (Springer, 2019-05-06)
Article
Accés obertIn this article, we describe the context in which an international race towards Exascale computing has started. We cover the political and economic context and make a review of the recent history in high performance computing ... -
The next convergence: High-performance and mission-critical markets
Girbal, Sylvain; Moretó Planas, Miquel; Grasset, Arnaud; Abella Ferrer, Jaume; Quiñones, Eduardo; Cazorla Almeida, Francisco Javier; Yehia, Sami (2013)
Text en actes de congrés
Accés obertThe well-known convergence of the high-performance computing and the mobile markets has been a dominating factor in the computing market during the last two decades. In this paper we witness a new type of convergence between ... -
Thread assignment in multicore/multithreaded processors: A statistical approach
Radojković, Petar; Carpenter, Paul Matthew; Moretó Planas, Miquel; Cakarevic, Vladimir; Verdú Mulà, Javier; Pajuelo González, Manuel Alejandro; Cazorla Almeida, Francisco Javier; Nemirovsky, Mario; Valero Cortés, Mateo (2016-01-01)
Article
Accés obertThe introduction of multicore/multithreaded processors, comprised of a large number of hardware contexts (virtual CPUs) that share resources at multiple levels, has made process scheduling, in particular assignment of ... -
Towards reconfigurable accelerators in HPC: Designing a multipurpose eFPGA tile for heterogeneous SoCs
Hotfilter, Tim; Kreß, Fabian; Kempf, Fabian; Becker, Jürgen; Haro Ruiz, Juan Miguel de; Jiménez González, Daniel; Moretó Planas, Miquel; Álvarez Martínez, Carlos; Labarta Mancho, Jesús José; Baili, Imen (Institute of Electrical and Electronics Engineers (IEEE), 2022)
Text en actes de congrés
Accés obertThe goal of modern high performance computing platforms is to combine low power consumption and high throughput. Within the European Processor Initiative (EPI), such an SoC platform to meet the novel exascale requirements ... -
Towards resilient EU HPC systems: A blueprint
Radojković, Petar; Marazakis, Manolis; Carpenter, Paul Matthew; Jeyapaul, Reiley; Gizopoulos, Dimitris; Schulz, Martin; Armejach Sanosa, Adrià; Ayguadé Parra, Eduard; Canal Corretger, Ramon; Moretó Planas, Miquel; Salami, Behzad; Unsal, Osman Sabri (2020-04)
Report de recerca
Accés obertThis document aims to spearhead a Europe-wide discussion on HPC system resilience and to help the European HPC community define best practices for resilience. We analyse a wide range of state-of-the-art resilience mechanisms ... -
Using Arm’s scalable vector extension on stencil codes
Armejach Sanosa, Adrià; Caminal Pallarés, Helena; Cebrián González, Juan Manuel; Langarita, Rubén; González-Alberquilla, Rekai; Adeniyi-Jones, Chris; Valero Cortés, Mateo; Casas, Marc; Moretó Planas, Miquel (2020-03)
Article
Accés obertData-level parallelism is frequently ignored or underutilized. Achieved through vector/SIMD capabilities, it can provide substantial performance improvements on top of widely used techniques such as thread-level parallelism. ... -
Using graph partitioning to accelerate task-based parallel applications
Sánchez Barrera, Isaac; Casas, Marc; Moretó Planas, Miquel; Ayguadé Parra, Eduard; Labarta Mancho, Jesús José; Valero Cortés, Mateo (Barcelona Supercomputing Center, 2015-05-05)
Text en actes de congrés
Accés obertCurrent high performance computing architectures are composed of large shared memory NUMA nodes, among other components. Such nodes are becoming increasingly complex as they have several NUMA domains with different access ... -
VIA: A smart scratchpad for vector units with application to sparse matrix computations
Pavón Rivera, Julián; Vargas Valdivieso, Iván; Barredo Ferreira, Adrián; Marimon Illana, Joan; Moretó Planas, Miquel; Moll Echeto, Francisco de Borja; Unsal, Osman Sabri; Valero Cortés, Mateo; Cristal Kestelman, Adrián (Institute of Electrical and Electronics Engineers (IEEE), 2021)
Text en actes de congrés
Accés obertSparse matrix operations are critical kernels in multiple application domains such as High Performance Computing, artificial intelligence and big data. Vector processing is widely used to improve performance on mathematical ... -
WFA-FPGA: An efficient accelerator of the wavefront algorithm for short and long read genomics alignment
Haghi, Abbas; Marco-Sola, Santiago; Álvarez Martí, Lluc; Diamantopoulos, Dionysios; Hagleitner, Christoph; Moretó Planas, Miquel (Elsevier, 2023-12)
Article
Accés restringit per política de l'editorialIn the last years, advances in genome sequencing technologies have enabled the proliferation of genomic applications that guide personalized medicine. These applications have an enormous computational cost due to the large ... -
WFA-GPU: Gap-affine pairwise read-alignment using GPUs
Aguado Puig, Quim; Doblas Font, Max; Matzoros, Christos; Espinosa Morales, Antonio; Moure López, Juan Carlos; Marco-Sola, Santiago; Moretó Planas, Miquel (2023-12)
Article
Accés obertMotivation: Advances in genomics and sequencing technologies demand faster and more scalable analysis methods that can process longer sequences with higher accuracy. However, classical pairwise alignment methods, based on ... -
WFAsic: A high-performance ASIC accelerator for DNA sequence alignment on a RISC-V SoC
Haghi, Abbas; Álvarez Martí, Lluc; Fornt Mas, Jordi; Haro Ruiz, Juan Miguel de; Figueras Bagué, Roger; Doblas Font, Max; Marco Sola, Santiago; Moretó Planas, Miquel (Association for Computing Machinery (ACM), 2023)
Text en actes de congrés
Accés obertThe ever-increasing yields in genome sequence data production pose a computational challenge to current genome sequence analysis tools, jeopardizing the future of personalized medicine. Leveraging hardware accelerators ...