Exploració per tema "Memory bandwidth"

Ara es mostren els items 1-7 de 7

    • Bandwidth of crossbar and multiple-bus connections for multiprocessors 

      Lang, Tomás; Valero Cortés, Mateo; Alegre de Miguel, Ignasi (1982-12)
      Article
      Accés obert
      In this paper we compare the effective bandwidth in a multiprocessor with shared memory using as interconnection networks the crossbar or the multiple-bus. We consider a system with N processors and N memory modules, in ...

    • Contention-aware application performance prediction for disaggregated memory systems 

      Vieira Zacarias, Felippe; Nishtala, Rajiv; Carpenter, Paul Matthew (Association for Computing Machinery (ACM), 2020)
      Text en actes de congrés
      Accés obert
      Disaggregated memory has recently been proposed as a way to allow flexible and fine-grained allocation of memory capacity to compute jobs. This paper makes an important step towards effective resource allocation on ...

    • HPC benchmarking: scaling right and looking beyond the average 

      Radulović, Milan; Asifuzzaman, Kazi; Carpenter, Paul Matthew; Radojković, Petar; Ayguadé Parra, Eduard (Springer, 2018)
      Text en actes de congrés
      Accés obert
      Designing a balanced HPC system requires an understanding of the dominant performance bottlenecks. There is as yet no well established methodology for a unified evaluation of HPC systems and workloads that quantifies the ...

    • Parallel frame rendering: trading responsiveness for energy on a mobile GPU 

      Arnau Montañés, José María; Parcerisa Bundó, Joan Manuel; Xekalakis, Polychronis (2013)
      Text en actes de congrés
      Accés restringit per política de l'editorial
      Perhaps one of the most important design aspects for smartphones and tablets is improving their energy efficiency. Unfortunately, rich media content applications typically put significant pressure to the GPU's memory ...

    • PROFET: modeling system performance and energy without simulating the CPU 

      Radulović, Milan; Sánchez-Verdejo, Rommel; Carpenter, Paul Matthew; Radojković, Petar; Jacob, Bruce; Ayguadé Parra, Eduard (2019-06)
      Article
      Accés obert
      The approaching end of DRAM scaling and expansion of emerging memory technologies is motivating a lot of research in future memory systems. Novel memory systems are typically explored by hardware simulators that are slow ...

    • Profiling memory vulnerability of big-data applications 

      Rameshan, Navaneeth; Birke, R.; Navarro Moldes, Leandro; Vlassov, Vladimir; Urgaonkar, B.; Kesidis, G.; Schmatz, M.; Chen, L. Y. (Institute of Electrical and Electronics Engineers (IEEE), 2016)
      Text en actes de congrés
      Accés restringit per política de l'editorial
      Motivated by the increasing popularity of hosting in-memory big-data analytics in cloud, we present a profiling methodology that can understand how different memory subsystems, i.e., cache and memory bandwidth, are susceptible ...

    • Short reasons for long vectors in HPC CPUs: a study based on RISC-V 

      Vizcaíno Serrano, Pablo; Ieronymakis, Georgios; Dimou, Nikolaus; Papaefstathiou, Vassilis; Labarta Mancho, Jesús José; Mantovani, Filippo (Association for Computing Machinery (ACM), 2023)
      Text en actes de congrés
      Accés obert
      For years, SIMD/vector units have enhanced the capabilities of modern CPUs in High-Performance Computing (HPC) and mobile technology. Typical commercially-available SIMD units process up to 8 double-precision elements with ...