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Overhead of the spin-lock loop in UltraSPARC T2
dc.contributor.author | Cakarevic, Vladimir |
dc.contributor.author | Radojković, Petar |
dc.contributor.author | Cazorla Almeida, Francisco Javier |
dc.contributor.author | Gioiosa, Roberto |
dc.contributor.author | Nemirovsky, Mario |
dc.contributor.author | Valero Cortés, Mateo |
dc.contributor.author | Pajuelo González, Manuel Alejandro |
dc.contributor.author | Verdú Mulà, Javier |
dc.contributor.other | Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors |
dc.date.accessioned | 2010-10-25T15:00:56Z |
dc.date.available | 2010-10-25T15:00:56Z |
dc.date.created | 2008-06-04 |
dc.date.issued | 2008-06-04 |
dc.identifier.citation | Cakarevic, V. [et al.]. Overhead of the spin-lock loop in UltraSPARC T2. A: HiPEAC Industrial Workshop. "5th HiPEAC Industrial Workshop. Tools and Methodology for Parallel Programming". Barcelona: 2008, p. 1-2. |
dc.identifier.uri | http://hdl.handle.net/2117/9973 |
dc.description.abstract | Spin locks are task synchronization mechanism used to provide mutual exclusion to shared software resources. Spin locks have a good performance in several situations over other synchronization mechanisms, i.e., when on average tasks wait short time to obtain the lock, the probability of getting the lock is high, or when there is no other synchronization mechanism. In this paper we study the effect that the execution of spinlocks create in multithreaded processors. Besides going to multicore architectures, recent industry trends show a big move toward hardware multithreaded processors. Intel P4, IBM POWER5 and POWER6, Sun's UltraSPARC T1 and T2 all this processors implement multithreading in various degrees. By sharing more processor resources we can increase system's performance, but at the same time, it increases the impact that processes executing simultaneously introduce to each other. |
dc.format.extent | 2 p. |
dc.language.iso | eng |
dc.rights | Attribution-NonCommercial-NoDerivs 3.0 Spain |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/3.0/es/ |
dc.subject | Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors |
dc.subject.lcsh | Simultaneous multithreading processors |
dc.subject.lcsh | Parallel processing (Electronic computers) |
dc.title | Overhead of the spin-lock loop in UltraSPARC T2 |
dc.type | Conference report |
dc.subject.lemac | Processament en paral·lel (Ordinadors) |
dc.subject.lemac | Multiprocessadors |
dc.contributor.group | Universitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions |
dc.rights.access | Open Access |
local.identifier.drac | 2358607 |
dc.description.version | Postprint (published version) |
local.citation.author | Cakarevic, V.; Radojkovic, P.; Cazorla, F.; Gioiosa, R.; Nemirovsky, M.; Valero, M.; Pajuelo, A.; Verdu, J. |
local.citation.contributor | HiPEAC Industrial Workshop |
local.citation.pubplace | Barcelona |
local.citation.publicationName | 5th HiPEAC Industrial Workshop. Tools and Methodology for Parallel Programming |
local.citation.startingPage | 1 |
local.citation.endingPage | 2 |