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The AXIOM software layers
dc.contributor.author | Álvarez, Carlos |
dc.contributor.author | Ayguadé Parra, Eduard |
dc.contributor.author | Bosch Pons, Jaume |
dc.contributor.author | Bueno Hedo, Javier |
dc.contributor.author | Cherkashin, Artem |
dc.contributor.author | Filgueras Izquierdo, Antonio |
dc.contributor.author | Jiménez González, Daniel |
dc.contributor.author | Martorell Bofill, Xavier |
dc.contributor.author | Navarro, Nacho |
dc.contributor.author | Vidal, Miquel |
dc.contributor.author | Theodoropoulos, Dimitris |
dc.contributor.author | Pnevmatikatos, Dionisis |
dc.contributor.author | Catani, Davide |
dc.contributor.author | Oro Garcia, David |
dc.contributor.author | Fernandez Prades, Carles |
dc.contributor.author | Segura, Carlos |
dc.contributor.author | Rodriguez Saeta, Javier |
dc.contributor.author | Hernando Pericás, Francisco Javier |
dc.contributor.author | Scordino, Claudio |
dc.contributor.author | Gai, Paolo |
dc.contributor.author | Passera, Pierluigi |
dc.contributor.author | Pomella, Alberto |
dc.contributor.author | Bettin, Nicola |
dc.contributor.author | Rizzo, Antonio |
dc.contributor.author | Giorgi, Roberto |
dc.contributor.other | Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors |
dc.contributor.other | Facultat d'Informàtica de Barcelona |
dc.contributor.other | Universitat Politècnica de Catalunya. Departament de Teoria del Senyal i Comunicacions |
dc.date.accessioned | 2017-01-19T13:56:29Z |
dc.date.available | 2018-07-10T00:30:19Z |
dc.date.issued | 2016-11-01 |
dc.identifier.citation | Álvarez, C., Ayguade, E., Bosch, J., Bueno, J., Cherkashin, A., Filgueras, A., Jimenez, D., Martorell, X., Navarro, N., Vidal, M., Theodoropoulos, D., Pnevmatikatos, D., Catani, D., Oro, D., Fernandez, C., Segura, C., Rodriguez, J., Hernando, J., Scordino, C., Gai, P., Passera , P., Pomella, A., Bettin, N., Rizzo, A., Giorgi, R. The AXIOM software layers. "Microprocessors and microsystems", 1 Novembre 2016, vol. 47, núm. PB, p. 262-277. |
dc.identifier.issn | 0141-9331 |
dc.identifier.uri | http://hdl.handle.net/2117/99698 |
dc.description.abstract | AXIOM project aims at developing a heterogeneous computing board (SMP-FPGA).The Software Layers developed at the AXIOM project are explained.OmpSs provides an easy way to execute heterogeneous codes in multiple cores. People and objects will soon share the same digital network for information exchange in a world named as the age of the cyber-physical systems. The general expectation is that people and systems will interact in real-time. This poses pressure onto systems design to support increasing demands on computational power, while keeping a low power envelop. Additionally, modular scaling and easy programmability are also important to ensure these systems to become widespread. The whole set of expectations impose scientific and technological challenges that need to be properly addressed.The AXIOM project (Agile, eXtensible, fast I/O Module) will research new hardware/software architectures for cyber-physical systems to meet such expectations. The technical approach aims at solving fundamental problems to enable easy programmability of heterogeneous multi-core multi-board systems. AXIOM proposes the use of the task-based OmpSs programming model, leveraging low-level communication interfaces provided by the hardware. Modular scalability will be possible thanks to a fast interconnect embedded into each module. To this aim, an innovative ARM and FPGA-based board will be designed, with enhanced capabilities for interfacing with the physical world. Its effectiveness will be demonstrated with key scenarios such as Smart Video-Surveillance and Smart Living/Home (domotics). |
dc.format.extent | 16 p. |
dc.language.iso | eng |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/3.0/es/ |
dc.subject | Àrees temàtiques de la UPC::Informàtica |
dc.subject | Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors::Arquitectures paral·leles |
dc.subject.lcsh | Microprocessors |
dc.subject.lcsh | Parallel processing (Electronic computers) |
dc.subject.other | Cyber-physical systems |
dc.subject.other | Ompss |
dc.subject.other | Cluster programming |
dc.subject.other | FPGA Programming |
dc.subject.other | Distributed shared memory |
dc.subject.other | Smart home |
dc.subject.other | Smart video-surveillance |
dc.title | The AXIOM software layers |
dc.type | Article |
dc.subject.lemac | Microprocessadors |
dc.subject.lemac | Processament en paral·lel (Ordinadors) |
dc.contributor.group | Universitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions |
dc.contributor.group | Universitat Politècnica de Catalunya. VEU - Grup de Tractament de la Parla |
dc.identifier.doi | 10.1016/j.micpro.2016.07.002 |
dc.description.peerreviewed | Peer Reviewed |
dc.rights.access | Open Access |
local.identifier.drac | 19620056 |
dc.description.version | Postprint (author's final draft) |
dc.relation.projectid | info:eu-repo/grantAgreement/EC/H2020/645496/EU/Agile, eXtensible, fast I%2FO Module for the cyber-physical era/AXIOM |
local.citation.author | Álvarez, C.; Ayguade, E.; Bosch, J.; Bueno, J.; Cherkashin, A.; Filgueras, A.; Jimenez, D.; Martorell, X.; Navarro, N.; Vidal, M.; Theodoropoulos, D.; Pnevmatikatos, D.; Catani, D.; Oro, D.; Fernandez, C.; Segura, C.; Rodriguez, J.; Hernando, J.; Scordino, C.; Gai, P.; Passera, P.; Pomella, A.; Bettin, N.; Rizzo, A.; Giorgi, R. |
local.citation.publicationName | Microprocessors and microsystems |
local.citation.volume | 47 |
local.citation.number | PB |
local.citation.startingPage | 262 |
local.citation.endingPage | 277 |
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