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dc.contributor.authorNejat, Arash
dc.contributor.authorHely, David
dc.contributor.authorBeroulle, Vincent
dc.coverage.spatialeast=2.11563799999999; north=41.38479239999999; name=Zona Universitària-Escola T S d'Enginyers, 08028 Barcelona, Espanya
dc.date.accessioned2017-01-16T11:55:38Z
dc.date.available2017-01-16T11:55:38Z
dc.date.issued2016-11-16
dc.identifier.urihttp://hdl.handle.net/2117/99303
dc.description.abstractHardware Trojan (HT) and Integrated Circuit (IC)/ Intellectual Property (IP) piracy are important threats which may happen in untrusted fabrication foundries. Modifying structurally the ICs/IPs design to counter the HT threats has been proposed, and it is known as Design-For-Hardware-Trust (DFHT). DFHT methods are used in order to facilitate HT detection methods. In addition, logic masking methods modify the IPs/ICs design to harden them against the IP/IC piracy. These methods modify a circuit such that it does not work correctly without applying the correct key. In this paper, we propose DFHT methods leveraging logic masking approach.
dc.format.extent2 p.
dc.language.isoeng
dc.rightsAttribution-NonCommercial-NoDerivs 3.0 Spain
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/3.0/es/
dc.subjectÀrees temàtiques de la UPC::Enginyeria electrònica
dc.subject.lcshEmbedded computer systems--Congresses
dc.subject.lcshIntegrated circuits
dc.subject.lcshComputer networks--Security measures
dc.titleReusing Logic Masking to Facilitate Hardware Trojan Detection
dc.typeConference report
dc.subject.lemacSistemes integrats -- Congressos
dc.subject.lemacCircuits integrats
dc.subject.lemacSeguretat informàtica -- Congressos
dc.rights.accessOpen Access


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