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Indirect test of M-S circuits using multiple specification band guarding
dc.contributor.author | Gómez Pau, Álvaro |
dc.contributor.author | Balado Suárez, Luz María |
dc.contributor.author | Figueras Pàmies, Joan |
dc.contributor.other | Universitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica |
dc.date.accessioned | 2017-01-13T09:34:32Z |
dc.date.available | 2018-04-25T00:30:40Z |
dc.date.issued | 2016-09-01 |
dc.identifier.citation | Álvaro Gómez-Pau, Balado, L., Figueras, J. Indirect test of M-S circuits using multiple specification band guarding. "Integration. The VLSI journal", 1 Setembre 2016, vol. 55, p. 415-424. |
dc.identifier.issn | 0167-9260 |
dc.identifier.uri | http://hdl.handle.net/2117/99195 |
dc.description.abstract | Testing analog and mixed-signal circuits is a costly task due to the required test time targets and high end technical resources. Indirect testing methods partially address these issues providing an efficient solution using easy to measure CUT information that correlates with circuit performances. In this work, a multiple specification band guarding technique is proposed as a method to achieve a test target of misclassified circuits. The acceptance/rejection test regions are encoded using octrees in the measurement space, where the band guarding factors precisely tune the test decision boundary according to the required test yield targets. The generated octree data structure serves to cluster the forthcoming circuits in the production testing phase by solely relying on indirect measurements. The combined use of octree based encoding and multiple specification band guarding makes the testing procedure fast, efficient and highly tunable. The proposed band guarding methodology has been applied to test a band-pass Butterworth filter under parametric variations. Promising simulation results are reported showing remarkable improvements when the multiple specification band guarding criterion is used. |
dc.format.extent | 10 p. |
dc.language.iso | eng |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/3.0/es/ |
dc.subject | Àrees temàtiques de la UPC::Enginyeria electrònica::Components electrònics::Transistors |
dc.subject.lcsh | Transistors |
dc.subject.other | Band guarding |
dc.subject.other | Multiple specification |
dc.subject.other | Mixed-signal testing |
dc.subject.other | Alternate test |
dc.subject.other | Indirect measurements |
dc.subject.other | Indirect measurements selection |
dc.subject.other | Test escapes |
dc.subject.other | Test yield loss |
dc.subject.other | Octrees |
dc.subject.other | Quadtrees |
dc.subject.other | Classifiers |
dc.subject.other | Butterworth filter |
dc.title | Indirect test of M-S circuits using multiple specification band guarding |
dc.type | Article |
dc.subject.lemac | Transistors |
dc.contributor.group | Universitat Politècnica de Catalunya. QINE - Disseny de Baix Consum, Test, Verificació i Circuits Integrats de Seguretat |
dc.identifier.doi | 10.1016/j.vlsi.2016.04.007 |
dc.description.peerreviewed | Peer Reviewed |
dc.relation.publisherversion | http://www.sciencedirect.com/science/article/pii/S0167926016300104 |
dc.rights.access | Open Access |
local.identifier.drac | 19343419 |
dc.description.version | Postprint (author's final draft) |
local.citation.author | Gómez-Pau, Álvaro; Balado, L.; Figueras, J. |
local.citation.publicationName | Integration. The VLSI journal |
local.citation.volume | 55 |
local.citation.startingPage | 415 |
local.citation.endingPage | 424 |
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