The Mont-Blanc prototype: an alternative approach for HPC systems
Cita com:
hdl:2117/99182
Document typeConference report
Defense date2016
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Rights accessOpen Access
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ProjectMONT-BLANC 2 - Mont-Blanc 2, European scalable and power efficient HPC platform based on low-power embedded technology (EC-FP7-610402)
MONT-BLANC - Mont-Blanc, European scalable and power efficient HPC platform based on low-power embedded technology (EC-FP7-288777)
MONT-BLANC - Mont-Blanc, European scalable and power efficient HPC platform based on low-power embedded technology (EC-FP7-288777)
Abstract
High-performance computing (HPC) is recognized as one of the pillars for further progress in science, industry, medicine, and education. Current HPC systems are being developed to overcome emerging architectural challenges in order to reach Exascale level of performance, projected for the year 2020. The much larger embedded and mobile market allows for rapid development of intellectual property (IP) blocks and provides more flexibility in designing an application specific system-on-chip (SoC), in turn providing the possibility in balancing performance, energy-efficiency, and cost. In the Mont-Blanc project, we advocate for HPC systems being built from such commodity IP blocks, currently used in embedded and mobile SoCs.
As a first demonstrator of such an approach, we present the Mont-Blanc prototype; the first HPC system built with commodity SoCs, memories, and network interface cards (NICs) from the embedded and mobile domain, and off-the-shelf HPC networking, storage, cooling, and integration solutions. We present the system’s architecture and evaluate both performance and energy efficiency. Further, we compare the system’s abilities against a production level supercomputer.
At the end, we discuss parallel scalability and estimate the maximum scalability point of this approach across a set of
applications.
CitationRajovic, N., Rico, A., Mantovani, F., Ruiz, D., Vlarrubi, J., Gomez, C., Backes, L., Nieto, D., Servat, H., Martorell, X., Labarta, J., Ayguade, E., Adeniyi-Jones, C., Derradji, S., Gloaguen, H., Lanucara, P., Sanna, N., Mehaut, J., Pouget, K., Videau, B., Boyer, E., Allalen, M., Auweter, A., Brayford, D., Tafani, D., Weinberg, V., Brömmel, D., Halver, R., Meinke, J., Beivide, R., Benito, M., Vallejo, E., Valero, M., Ramirez, A. The mont-blanc prototype: an alternative approach for HPC systems. A: International Conference for High Performance Computing, Networking, Storage and Analysis. "SC'16: International Conference for High Performance Computing, Networking, Storage and Analysis: proceedings: Salt Lake City, UT, USA: November 13-18, 2016". Salt Lake City, UT: Institute of Electrical and Electronics Engineers (IEEE), 2016, p. 38:1-38:12.
ISBN978-1-4673-8815-3
Publisher versionhttp://dl.acm.org/citation.cfm?id=3014955
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