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Three-phase synchronisation technique performance comparison under voltage disturbances

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hdl:2117/98305

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Montero Cassinello, José
Tutor / directorGomis Bellmunt, OriolMés informacióMés informacióMés informació
Document typeBachelor thesis
Date2016-06-23
Rights accessOpen Access
Attribution-NonCommercial-NoDerivs 3.0 Spain
Except where otherwise noted, content on this work is licensed under a Creative Commons license : Attribution-NonCommercial-NoDerivs 3.0 Spain
Abstract
In this project, six grid synchronisation techniques’ performance have been tested under thirteen voltage faults tests. In order to achieve synchrony with a three-phase voltage input, a PLL or PhaseLocked Loop is used. This control System processes the input signal and detects its phase by means of a series of mathematical transformations and filtering techniques that are detailed in this project. Phase-Locked Loops are an essential part of any synchronous control system. The phase output of the PLL is used to ensure the stable performance of grid-connected equipment, especially in the case of power converters used in grid power injection from renewable sources. Under balanced conditions PLL performance is very consistent. However, under disturbances in the voltage input the performance of many PLLs is compromised. Thirteen tests that include the most common kinds of faults have been designed in order to test the performance of the six studied PLL designs. All of the simulations have been carried out with Matlab SIMULINK software.
SubjectsElectromotive force, Força electromotriu
DegreeGRAU EN ENGINYERIA EN TECNOLOGIES INDUSTRIALS (Pla 2010)
URIhttp://hdl.handle.net/2117/98305
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  • Escola Tècnica Superior d'Enginyeria Industrial de Barcelona - Grau en Enginyeria en Tecnologies Industrials (Pla 2010) [3.025]
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