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dc.contributor.authorVourkas, Ioanis
dc.contributor.authorAbusleme, A.
dc.contributor.authorNtinas, V.
dc.contributor.authorSirakoulis, Georgios Ch.
dc.contributor.authorRubio Sola, Jose Antonio
dc.contributor.otherUniversitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica
dc.date.accessioned2016-11-24T13:58:47Z
dc.date.issued2016
dc.identifier.citationVourkas, I., Abusleme, A., Ntinas, V., Sirakoulis, G., Rubio, A. A digital memristor emulator for FPGA-based artificial neural networks. A: IEEE International Verification and Security Workshop. "2016 1st IEEE International Verification and Security Workshop (IVSW 2016): Sant Feliu de Guixols, Spain: 4-6 July 2016". Sant Feliu de Guixols, Girona: Institute of Electrical and Electronics Engineers (IEEE), 2016, p. 54-57.
dc.identifier.isbn978-1-5090-1141-4
dc.identifier.urihttp://hdl.handle.net/2117/97184
dc.description.abstractFPGAs are reconfigurable electronic platforms, well-suited to implement complex artificial neural networks (ANNs). To this end, the compact hardware (HW) implementation of artificial synapses is an important step to obtain human brain-like functionalities at circuit-level. In this context, the memristor has been proposed as the electronic analogue of biological synapses, but the price of commercially available samples still remains high, hence motivating the development of HW emulators. In this work we present the first digital memristor emulator based upon a voltagecontrolled threshold-type bipolar memristor model. We validate its functionality in low-cost yet powerful FPGA families. We test its suitability for complex memristive circuits and prove its synaptic properties in a small associative memory via a perceptron ANN.
dc.format.extent4 p.
dc.language.isoeng
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/3.0/es/
dc.subjectÀrees temàtiques de la UPC::Enginyeria de la telecomunicació::Telemàtica i xarxes d'ordinadors
dc.subjectÀrees temàtiques de la UPC::Informàtica::Seguretat informàtica
dc.subject.lcshNeural networks (Computer science)
dc.subject.lcshComputer security
dc.subject.otherCircuit testing
dc.subject.otherDigital circuits
dc.subject.otherField programmable gate arrays
dc.subject.otherMemristor circuits
dc.subject.otherNeural nets
dc.subject.otherPerceptron ANN
dc.subject.otherMemristive circuits
dc.subject.otherVoltage-controlled threshold-type bipolar memristor model
dc.subject.otherFPGA-based artificial neural networks
dc.subject.otherDigital memristor emulator
dc.titleA digital memristor emulator for FPGA-based artificial neural networks
dc.typeConference report
dc.subject.lemacXarxes neuronals (Informàtica)
dc.subject.lemacSeguretat informàtica
dc.contributor.groupUniversitat Politècnica de Catalunya. HIPICS - Grup de Circuits i Sistemes Integrats d'Altes Prestacions
dc.identifier.doi10.1109/IVSW.2016.7566607
dc.description.peerreviewedPeer Reviewed
dc.relation.publisherversionhttp://ieeexplore.ieee.org/document/7566607/
dc.rights.accessRestricted access - publisher's policy
local.identifier.drac19074367
dc.description.versionPostprint (published version)
dc.date.lift10000-01-01
local.citation.authorVourkas, I.; Abusleme, A.; Ntinas, V.; Sirakoulis, G.; Rubio, A.
local.citation.contributorIEEE International Verification and Security Workshop
local.citation.pubplaceSant Feliu de Guixols, Girona
local.citation.publicationName2016 1st IEEE International Verification and Security Workshop (IVSW 2016): Sant Feliu de Guixols, Spain: 4-6 July 2016
local.citation.startingPage54
local.citation.endingPage57


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