Ir al contenido (pulsa Retorno)

Universitat Politècnica de Catalunya

    • Català
    • Castellano
    • English
    • LoginRegisterLog in (no UPC users)
  • mailContact Us
  • world English 
    • Català
    • Castellano
    • English
  • userLogin   
      LoginRegisterLog in (no UPC users)

UPCommons. Global access to UPC knowledge

Banner header
59.707 UPC E-Prints
You are here:
View Item 
  •   DSpace Home
  • E-prints
  • Grups de recerca
  • HIPICS - High Performance Integrated Circuits and Systems
  • Ponències/Comunicacions de congressos
  • View Item
  •   DSpace Home
  • E-prints
  • Grups de recerca
  • HIPICS - High Performance Integrated Circuits and Systems
  • Ponències/Comunicacions de congressos
  • View Item
JavaScript is disabled for your browser. Some features of this site may not work without it.

A digital memristor emulator for FPGA-based artificial neural networks

Thumbnail
View/Open
07566607.pdf (379,0Kb) (Restricted access)   Request copy 

Què és aquest botó?

Aquest botó permet demanar una còpia d'un document restringit a l'autor. Es mostra quan:

  • Disposem del correu electrònic de l'autor
  • El document té una mida inferior a 20 Mb
  • Es tracta d'un document d'accés restringit per decisió de l'autor o d'un document d'accés restringit per política de l'editorial
Share:
 
 
10.1109/IVSW.2016.7566607
 
  View Usage Statistics
Cita com:
hdl:2117/97184

Show full item record
Vourkas, Ioanis
Abusleme, A.
Ntinas, V.
Sirakoulis, Georgios Ch.
Rubio Sola, Jose AntonioMés informacióMés informacióMés informació
Document typeConference report
Defense date2016
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Rights accessRestricted access - publisher's policy
Attribution-NonCommercial-NoDerivs 3.0 Spain
Except where otherwise noted, content on this work is licensed under a Creative Commons license : Attribution-NonCommercial-NoDerivs 3.0 Spain
Abstract
FPGAs are reconfigurable electronic platforms, well-suited to implement complex artificial neural networks (ANNs). To this end, the compact hardware (HW) implementation of artificial synapses is an important step to obtain human brain-like functionalities at circuit-level. In this context, the memristor has been proposed as the electronic analogue of biological synapses, but the price of commercially available samples still remains high, hence motivating the development of HW emulators. In this work we present the first digital memristor emulator based upon a voltagecontrolled threshold-type bipolar memristor model. We validate its functionality in low-cost yet powerful FPGA families. We test its suitability for complex memristive circuits and prove its synaptic properties in a small associative memory via a perceptron ANN.
CitationVourkas, I., Abusleme, A., Ntinas, V., Sirakoulis, G., Rubio, A. A digital memristor emulator for FPGA-based artificial neural networks. A: IEEE International Verification and Security Workshop. "2016 1st IEEE International Verification and Security Workshop (IVSW 2016): Sant Feliu de Guixols, Spain: 4-6 July 2016". Sant Feliu de Guixols, Girona: Institute of Electrical and Electronics Engineers (IEEE), 2016, p. 54-57. 
URIhttp://hdl.handle.net/2117/97184
DOI10.1109/IVSW.2016.7566607
ISBN978-1-5090-1141-4
Publisher versionhttp://ieeexplore.ieee.org/document/7566607/
Collections
  • HIPICS - High Performance Integrated Circuits and Systems - Ponències/Comunicacions de congressos [144]
  • Departament d'Enginyeria Electrònica - Ponències/Comunicacions de congressos [1.643]
Share:
 
  View Usage Statistics

Show full item record

FilesDescriptionSizeFormatView
07566607.pdfBlocked379,0KbPDFRestricted access

Browse

This CollectionBy Issue DateAuthorsOther contributionsTitlesSubjectsThis repositoryCommunities & CollectionsBy Issue DateAuthorsOther contributionsTitlesSubjects

© UPC Obrir en finestra nova . Servei de Biblioteques, Publicacions i Arxius

info.biblioteques@upc.edu

  • About This Repository
  • Contact Us
  • Send Feedback
  • Privacy Settings
  • Inici de la pàgina