Contention-aware performance monitoring counter support for real-time MPSoCs
Tipus de documentComunicació de congrés
EditorInstitute of Electrical and Electronics Engineers (IEEE)
Condicions d'accésAccés obert
Tasks running in MPSoCs experience contention delays when accessing MPSoC’s shared resources, complicating task timing analysis and deriving execution time bounds. Understanding the Actual Contention Delay (ACD) each task suffers due to other corunning tasks, and the particular hardware shared resources in which contention occurs, is of prominent importance to increase confidence on derived execution time bounds of tasks. And, whenever those bounds are violated, ACD provides information on the reasons for overruns. Unfortunately, existing MPSoC designs considered in real-time domains offer limited hardware support to measure tasks’ ACD losing all these potential benefits. In this paper we propose the Contention Cycle Stack (CCS), a mechanism that extends performance monitoring counters to track specific events that allow estimating the ACD that each task suffers from every contending task on every hardware shared resource. We build the CCS using a set of specialized low-overhead Performance Monitoring Counters for the Cobham Gaisler GR740 (NGMP) MPSoC – used in the space domain – for which we show CCS’s benefits.
CitacióJalle, J., Fernández, M., Abella, J., Andersson, J., Patte, M., Fossati, L., Zulianello, M., Cazorla, F. Contention-aware performance monitoring counter support for real-time MPSoCs. A: IEEE International Symposium on Industrial Embedded Systems. "2016 11th IEEE International Symposium on Industrial Embedded Systems (SIES): Krakow, Poland 23-25 May 2016: proceedings". Krakow: Institute of Electrical and Electronics Engineers (IEEE), 2016, p. 1-10.
Versió de l'editorhttp://ieeexplore.ieee.org/abstract/document/7509440/