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dc.contributor.authorBenedicte Illescas, Pedro
dc.contributor.authorKosmidis, Leonidas
dc.contributor.authorQuiñones, Eduardo
dc.contributor.authorAbella Ferrer, Jaume
dc.contributor.authorCazorla Almeida, Francisco Javier
dc.contributor.otherUniversitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors
dc.contributor.otherBarcelona Supercomputing Center
dc.date.accessioned2016-11-15T10:54:45Z
dc.date.available2016-11-15T10:54:45Z
dc.date.issued2016
dc.identifier.citationBenedicte, P., Kosmidis, L., Quiñones, E., Abella, J., Cazorla, F. Modelling the confidence of timing analysis for time randomised caches. A: IEEE International Symposium on Industrial Embedded Systems. "2016 11th IEEE International Symposium on Industrial Embedded Systems (SIES): Krakow, Poland 23-25 May 2016: proceedings". Krakow: Institute of Electrical and Electronics Engineers (IEEE), 2016, p. 1-8.
dc.identifier.isbn978-1-5090-2282-3
dc.identifier.urihttp://hdl.handle.net/2117/96651
dc.description.abstractTiming is a key non-functional property in embedded real-Time systems (ERTS). ERTS increasingly require higher levels of performance that can only be sensibly provided by deploying high-performance hardware, which however complicates timing analysis. Measurement-Based Probabilistic Timing Analysis (MBPTA) aims at analysing the timing behaviour of ERTS deploying complex hardware features such as caches. A key parameter for MBPTA to provide reliable results is the number of runs to perform to ensure probabilistic representativeness of the execution time measurements taken at analysis time with respect to execution times that can occur during system operation. In this paper, focusing on the cache-acknowledged as one of the most complex resources to time analyse-we address the problem of determining whether the number of observations taken at analysis, as part of the normal MBPTA application process, captures the cache events significantly impacting execution time and Worst-Case Execution Time (WCET). If this is not the case, our techniques provide the user with the number of extra runs to perform to guarantee that those cache events are captured ensuring confidence on provided WCET estimates.
dc.description.sponsorshipThe research leading to these results has received funding from the European Community’s Seventh Framework Programme [FP7/2007-2013] under the PROXIMA Project (www.proxima-project.eu), grant agreement no 611085. This work was also supported by the Spanish Ministry of Science and Innovation under grant TIN2015-65316-P, the HiPEAC Network of Excellence. Jaume Abella was partially supported by the Ministry of Economy and Competitiveness under Ramon y Cajal postdoctoral fellowship (RYC-2013-14717).
dc.format.extent8 p.
dc.language.isoeng
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)
dc.subjectÀrees temàtiques de la UPC::Informàtica::Arquitectura de computadors
dc.subject.lcshCache memory
dc.subject.lcshEmbedded computer systems
dc.subject.otherTiming
dc.subject.otherReliability
dc.subject.otherHardware
dc.subject.otherStandards
dc.subject.otherSafety
dc.subject.otherProbabilistic logic
dc.titleModelling the confidence of timing analysis for time randomised caches
dc.typeConference report
dc.subject.lemacMemòria cau
dc.subject.lemacOrdinadors immersos, Sistemes d'
dc.contributor.groupUniversitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions
dc.identifier.doi10.1109/SIES.2016.7509421
dc.description.peerreviewedPeer Reviewed
dc.relation.publisherversionhttp://ieeexplore.ieee.org/document/7509421/
dc.rights.accessOpen Access
local.identifier.drac18852171
dc.description.versionPostprint (author's final draft)
dc.relation.projectidinfo:eu-repo/grantAgreement/MINECO//TIN2015-65316-P/ES/COMPUTACION DE ALTAS PRESTACIONES VII/
dc.relation.projectidinfo:eu-repo/grantAgreement/MINECO//RYC-2013-14717/ES/RYC-2013-14717/
local.citation.authorBenedicte, P.; Kosmidis, L.; Quiñones, E.; Abella, J.; Cazorla, F.
local.citation.contributorIEEE International Symposium on Industrial Embedded Systems
local.citation.pubplaceKrakow
local.citation.publicationName2016 11th IEEE International Symposium on Industrial Embedded Systems (SIES): Krakow, Poland 23-25 May 2016: proceedings
local.citation.startingPage1
local.citation.endingPage8


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