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dc.contributorCazorla Almeida, Francisco Javier
dc.contributorValero Cortés, Mateo
dc.contributorGioiosa, Roberto
dc.contributor.authorFigueiredo Boneti, Carlos Santieri de
dc.contributor.otherUniversitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors
dc.date.accessioned2011-04-12T15:02:58Z
dc.date.available2010-11-19
dc.date.issued2009-09-04
dc.date.submitted2010-11-18
dc.identifier.citationFigueiredo Boneti, C.S. de. Exploring coordinated software and hardware support for hardware resource allocation. Tesi doctoral, UPC, Departament d'Arquitectura de Computadors, 2009. ISBN 9788469404294. DOI 10.5821/dissertation-2117-93332.
dc.identifier.isbn9788469404294
dc.identifier.otherhttp://www.tdx.cat/TDX-1118110-122120
dc.identifier.urihttp://hdl.handle.net/2117/93332
dc.description.abstractMultithreaded processors are now common in the industry as they offer high performance at a low cost. Traditionally, in such processors, the assignation of hardware resources between the multiple threads is done implicitly, by the hardware policies. However, a new class of multithreaded hardware allows the explicit allocation of resources to be controlled or biased by the software. Currently, there is little or no coordination between the allocation of resources done by the hardware and the prioritization of tasks done by the software.<br/>This thesis targets to narrow the gap between the software and the hardware, with respect to the hardware resource allocation, by proposing a new explicit resource allocation hardware mechanism and novel schedulers that use the currently available hardware resource allocation mechanisms.<br/>It approaches the problem in two different types of computing systems: on the high performance computing domain, we characterize the first processor to present a mechanism that allows the software to bias the allocation hardware resources, the IBM POWER5. In addition, we propose the use of hardware resource allocation as a way to balance high performance computing applications. Finally, we propose two new scheduling mechanisms that are able to transparently and successfully balance applications in real systems using the hardware resource allocation. On the soft real-time domain, we propose a hardware extension to the existing explicit resource allocation hardware and, in addition, two software schedulers that use the explicit allocation hardware to improve the schedulability of tasks in a soft real-time system.<br/>In this thesis, we demonstrate that system performance improves by making the software aware of the mechanisms to control the amount of resources given to each running thread. In particular, for the high performance computing domain, we show that it is possible to decrease the execution time of MPI applications biasing the hardware resource assignation between threads. In addition, we show that it is possible to decrease the number of missed deadlines when scheduling tasks in a soft real-time SMT system.
dc.language.isoeng
dc.publisherUniversitat Politècnica de Catalunya
dc.rightsADVERTIMENT. L'accés als continguts d'aquesta tesi doctoral i la seva utilització ha de respectar els drets de la persona autora. Pot ser utilitzada per a consulta o estudi personal, així com en activitats o materials d'investigació i docència en els termes establerts a l'art. 32 del Text Refós de la Llei de Propietat Intel·lectual (RDL 1/1996). Per altres utilitzacions es requereix l'autorització prèvia i expressa de la persona autora. En qualsevol cas, en la utilització dels seus continguts caldrà indicar de forma clara el nom i cognoms de la persona autora i el títol de la tesi doctoral. No s'autoritza la seva reproducció o altres formes d'explotació efectuades amb finalitats de lucre ni la seva comunicació pública des d'un lloc aliè al servei TDX. Tampoc s'autoritza la presentació del seu contingut en una finestra o marc aliè a TDX (framing). Aquesta reserva de drets afecta tant als continguts de la tesi com als seus resums i índexs.
dc.sourceTDX (Tesis Doctorals en Xarxa)
dc.subjectÀrees temàtiques de la UPC::Informàtica
dc.subject.otherMT
dc.subject.otherCMP
dc.subject.otherharware priorities
dc.subject.otherthread prioritization
dc.subject.otherresource balancing
dc.subject.otherload balancing
dc.subject.otherpowers
dc.subject.othersimultaneous multithreading
dc.subject.otherSMT
dc.subject.otherhardware-software codesign
dc.subject.otherperformance characterization
dc.subject.othersoftware-controlled prioritization
dc.titleExploring coordinated software and hardware support for hardware resource allocation
dc.typeDoctoral thesis
dc.subject.lemacAssignació de recursos
dc.subject.lemacArquitectura d'ordinadors
dc.identifier.doi10.5821/dissertation-2117-93332
dc.identifier.dlB.11716-2011
dc.rights.accessOpen Access
dc.description.versionPostprint (published version)
dc.identifier.tdxhttp://hdl.handle.net/10803/6018


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