Show simple item record

dc.contributor.authorGrass, Thomas Dieter
dc.contributor.authorRico, Alejandro
dc.contributor.authorCasas, Marc
dc.contributor.authorMoreto Planas, Miquel
dc.contributor.authorAyguadé Parra, Eduard
dc.contributor.otherUniversitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors
dc.contributor.otherBarcelona Supercomputing Center
dc.date.accessioned2016-11-03T13:31:44Z
dc.date.available2016-11-03T13:31:44Z
dc.date.issued2016
dc.identifier.citationGrass, T., Rico, A., Casas, M., Moreto, M., Ayguadé, E. TaskPoint: sampled simulation of task-based programs. A: IEEE International Symposium on Performance Analysis of Systems and Software. "ISPASS 2016, International Symposium on Performance Analysis of Systems and Software: April 17-19 2016 Uppsala, Sweden". Uppsala: Institute of Electrical and Electronics Engineers (IEEE), 2016, p. 296-306.
dc.identifier.isbn978-1-5090-1952-6
dc.identifier.urihttp://hdl.handle.net/2117/91424
dc.description.abstractSampled simulation is a mature technique for reducing simulation time of single-threaded programs, but it is not directly applicable to simulation of multi-threaded architectures. Recent multi-threaded sampling techniques assume that the workload assigned to each thread does not change across multiple executions of a program. This assumption does not hold for dynamically scheduled task-based programming models. Task-based programming models allow the programmer to specify program segments as tasks which are instantiated many times and scheduled dynamically to available threads. Due to system noise and variation in scheduling decisions, two consecutive executions on the same machine typically result in different instruction streams processed by each thread. In this paper, we propose TaskPoint, a sampled simulation technique for dynamically scheduled task-based programs. We leverage task instances as sampling units and simulate only a fraction of all task instances in detail. Between detailed simulation intervals we employ a novel fast-forward mechanism for dynamically scheduled programs. We evaluate the proposed technique on a set of 19 task-based parallel benchmarks and two different architectures. Compared to detailed simulation, TaskPoint accelerates architectural simulation with 64 simulated threads by an average factor of 19.1 at an average error of 1.8% and a maximum error of 15.0%.
dc.description.sponsorshipThis work has been supported by the Spanish Government (Severo Ochoa grants SEV2015-0493, SEV-2011-00067), the Spanish Ministry of Science and Innovation (contract TIN2015-65316-P), Generalitat de Catalunya (contracts 2014-SGR-1051 and 2014-SGR-1272), the RoMoL ERC Advanced Grant (GA 321253), the European HiPEAC Network of Excellence and the Mont-Blanc project (EU-FP7-610402 and EU-H2020-671697). M. Moreto has been partially supported by the Ministry of Economy and Competitiveness under Juan de la Cierva postdoctoral fellowship JCI-2012-15047. M. Casas is supported by the Ministry of Economy and Knowledge of the Government of Catalonia and the Cofund programme of the Marie Curie Actions of the EUFP7 (contract 2013BP B 00243). T.Grass has been partially supported by the AGAUR of the Generalitat de Catalunya (grant 2013FI B 0058).
dc.format.extent11 p.
dc.language.isoeng
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)
dc.subjectÀrees temàtiques de la UPC::Informàtica::Arquitectura de computadors
dc.subject.lcshParallel programming (Computer science)
dc.subject.lcshSimultaneous multithreading processors
dc.subject.otherTaskPoint
dc.subject.otherSampled simulation
dc.subject.otherComputer architecture
dc.titleTaskPoint: sampled simulation of task-based programs
dc.typeConference report
dc.subject.lemacProgramació en paral·lel (Informàtica)
dc.contributor.groupUniversitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions
dc.identifier.doi10.1109/ISPASS.2016.7482104
dc.description.peerreviewedPeer Reviewed
dc.relation.publisherversionhttp://ieeexplore.ieee.org/document/7482104/
dc.rights.accessOpen Access
local.identifier.drac19029605
dc.description.versionPostprint (author's final draft)
dc.relation.projectidinfo:eu-repo/grantAgreement/MINECO/1PE/TIN2015-65316-P
dc.relation.projectidinfo:eu-repo/grantAgreement/EC/H2020/671697/EU/Mont-Blanc 3, European scalable and power efficient HPC platformbased on low-power embedded technology/Mont-Blanc 3
dc.relation.projectidinfo:eu-repo/grantAgreement/EC/FP7/321253/EU/Riding on Moore's Law/ROMOL
dc.relation.projectidinfo:eu-repo/grantAgreement/MINECO/SEV-2015-0493
dc.relation.projectidinfo:eu-repo/grantAgreement/MINECO/1PE/TIN2015-65316-P
local.citation.authorGrass, T.; Rico, A.; Casas, M.; Moreto, M.; Ayguadé, E.
local.citation.contributorIEEE International Symposium on Performance Analysis of Systems and Software
local.citation.pubplaceUppsala
local.citation.publicationNameISPASS 2016, International Symposium on Performance Analysis of Systems and Software: April 17-19 2016 Uppsala, Sweden
local.citation.startingPage296
local.citation.endingPage306


Files in this item

Thumbnail

This item appears in the following Collection(s)

Show simple item record

All rights reserved. This work is protected by the corresponding intellectual and industrial property rights. Without prejudice to any existing legal exemptions, reproduction, distribution, public communication or transformation of this work are prohibited without permission of the copyright holder