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dc.contributor.authorAleta Ortega, Alexandre
dc.contributor.authorCodina Viñas, Josep M.
dc.contributor.authorSánchez Navarro, F. Jesús
dc.contributor.authorGonzález Colás, Antonio María
dc.contributor.authorKaeli, D
dc.contributor.otherUniversitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors
dc.date.accessioned2016-10-27T07:26:29Z
dc.date.available2016-10-27T07:26:29Z
dc.date.issued2009-06
dc.identifier.citationAleta, A., Codina, J.M., Sánchez, F., González, A., Kaeli, D. AGAMOS: A graph-based approach to modulo scheduling for clustered microarchitectures. "IEEE transactions on computers", Juny 2009, vol. 58, núm. 6, p. 770-783.
dc.identifier.issn0018-9340
dc.identifier.urihttp://hdl.handle.net/2117/91144
dc.description.abstractThis paper presents AGAMOS, a technique to modulo schedule loops on clustered microarchitectures. The proposed scheme uses a multilevel graph partitioning strategy to distribute the workload among clusters and reduces the number of intercluster communications at the same time. Partitioning is guided by approximate schedules (i.e., pseudoschedules), which take into account all of the constraints that influence the final schedule. To further reduce the number of intercluster communications, heuristics for instruction replication are included. The proposed scheme is evaluated using the SPECfp95 programs. The described scheme outperforms a state-of-the-art scheduler for all programs and different cluster configurations. For some configurations, the speedup obtained when using this new scheme is greater than 40 percent, and for selected programs, performance can be more than doubled.
dc.format.extent14 p.
dc.language.isoeng
dc.subjectÀrees temàtiques de la UPC::Informàtica::Arquitectura de computadors
dc.subject.lcshMicroprocessors
dc.subject.lcshGraph theory
dc.subject.otherClustered microarchitectures
dc.subject.otherILP
dc.subject.otherInstruction replication
dc.subject.otherModulo scheduling
dc.subject.otherStatically scheduled processors
dc.titleAGAMOS: A graph-based approach to modulo scheduling for clustered microarchitectures
dc.typeArticle
dc.subject.lemacMicroprocessadors
dc.subject.lemacGrafs, Teoria de
dc.contributor.groupUniversitat Politècnica de Catalunya. ARCO - Microarquitectura i Compiladors
dc.identifier.doi10.1109/TC.2009.32
dc.description.peerreviewedPeer Reviewed
dc.relation.publisherversionhttp://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=4785457
dc.rights.accessOpen Access
drac.iddocument1658657
dc.description.versionPostprint (published version)
upcommons.citation.authorAleta, A., Codina, J.M., Sánchez, F., González, A., Kaeli, D.
upcommons.citation.publishedtrue
upcommons.citation.publicationNameIEEE transactions on computers
upcommons.citation.volume58
upcommons.citation.number6
upcommons.citation.startingPage770
upcommons.citation.endingPage783


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