Block-based execution on an integrated vector-scalar in-order core
Document typeConference report
PublisherBarcelona Supercomputing Center
Rights accessOpen Access
In the low-end processor mobile market, power, energy and area budgets are significantly lower than in the server/desktop/lap-top/high-end mobile markets. It has been shown that vector processors are a highly energy-efficient way to increase performance but adding support for them incurs area and power overheads that could not be acceptable for low-end mobile processors. In this work, we propose an integrated vector-scalar design that mostly reuses scalar hardware to support the execution of vector instructions. The key element of the design is our proposed block-based model of execution that groups vector instructions to execute them in a coordinated manner.
CitationStanic, Milan; Palomar Pérez, Óscar. Block-based execution on an integrated vector-scalar in-order core. A: 3rd BSC International Doctoral Symposium. "Book of abstracts". Barcelona: Barcelona Supercomputing Center, 2015, p. 89-90.