Implementation of systolic algorithms using pipelined functional units
Document typeConference report
Rights accessOpen Access
The authors present a method to implement systolic algorithms (SAs) using pipelined functional units (PFUs). This kind of unit makes it possible to improve the throughput of a processor because of the possibility of initiating a new operation before the previous one has been completed. The method permits transformation of a SA so that it can be efficiently executed using PFUs. The method is based on two temporal transformations (slowdown and retiming) and one spatial transformation (coalescing). The temporal transformations permit the modification of the SA in such a way that dependences established by the PFU are preserved. The spatial transformation improves the hardware utilization. The method was applied to 1-D SAs with data contraflow. To demonstrate the effectiveness of the method, the authors describe an efficient implementation of a non-time-homogeneous SA with data contraflow for QR decomposition
CitationValero-Garcia, M; Navarro, J.; Llaberia, J.; Valero, M. Implementation of systolic algorithms using pipelined functional units. A: International Conference on Application Specific Array Processors. "Proceedings of the International Conference on Application Specific Array Processors". Institute of Electrical and Electronics Engineers (IEEE), 1990, p. 272-283.
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