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Current sharing control strategy for IGBTs connected in parallel
dc.contributor.author | Pérez Delgado, Raul |
dc.contributor.author | Velasco Quesada, Guillermo |
dc.contributor.author | Román Lumbreras, Manuel |
dc.contributor.other | Universitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica |
dc.date.accessioned | 2016-06-27T11:17:55Z |
dc.date.available | 2016-06-27T11:17:55Z |
dc.date.issued | 2016-03-01 |
dc.identifier.citation | Pérez, R., Velasco, G., Roman, M. Current sharing control strategy for IGBTs connected in parallel. "Journal of Power Electronics", 01 Març 2016, vol. 16, núm. 2, p. 769-777. |
dc.identifier.issn | 1598-2092 |
dc.identifier.uri | http://hdl.handle.net/2117/88301 |
dc.description.abstract | This work focuses on current sharing between punch-through insulated gate bipolar transistors (IGBTs) connected in parallel and evaluates the mechanisms that allow overall current balancing. Two different control strategies are presented. These strategies are based on the modification of transistor gate-emitter control voltage VGE by using an active gate driver circuit. The first strategy relies on the calculation of the average value of the current flowing through all parallel-connected IGBTs. The second strategy is proposed by the authors on the basis of a current cross reference control scheme. Finally, the simulation and experimental results of the application of the two current sharing control algorithms are presented. |
dc.format.extent | 9 p. |
dc.language.iso | eng |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/3.0/es/ |
dc.subject | Àrees temàtiques de la UPC::Enginyeria electrònica |
dc.subject.lcsh | Power electronics |
dc.subject.other | Current imbalance |
dc.subject.other | Current sharing |
dc.subject.other | IGBT parallel operation |
dc.title | Current sharing control strategy for IGBTs connected in parallel |
dc.type | Article |
dc.subject.lemac | Electrònica de potència |
dc.contributor.group | Universitat Politècnica de Catalunya. EPIC - Energy Processing and Integrated Circuits |
dc.identifier.doi | 10.6113/JPE.2016.16.2.769 |
dc.description.peerreviewed | Peer Reviewed |
dc.relation.publisherversion | http://www.jpe.or.kr/archives/view_articles.asp?seq=1181 |
dc.rights.access | Open Access |
local.identifier.drac | 17692847 |
dc.description.version | Postprint (published version) |
local.citation.author | Pérez, R.; Velasco, G.; Roman, M. |
local.citation.publicationName | Journal of Power Electronics |
local.citation.volume | 16 |
local.citation.number | 2 |
local.citation.startingPage | 769 |
local.citation.endingPage | 777 |
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