Analysis and RTL correlation of instruction set simulators for automotive microcontroller robustness verification
Tipo de documentoTexto en actas de congreso
Fecha de publicación2015
EditorInstitute of Electrical and Electronics Engineers (IEEE)
Condiciones de accesoAcceso abierto
Proyecto de la Comisión EuropeaHIPEAC - High Performance and Embedded Architecture and Compilation (EC-FP7-287759)
Increasingly complex microcontroller designs for safety-relevant automotive systems require the adoption of new methods and tools to enable a cost-effective verification of their robustness. In particular, costs associated to the certification against the ISO26262 safety standard must be kept low for economical reasons. In this context, simulation-based verification using instruction set simulators (ISS) arises as a promising approach to partially cope with the increasing cost of the verification process as it allows taking design decisions in early design stages when modifications can be performed quickly and with low cost. However, it remains to be proven that verification in those stages provides accurate enough information to be used in the context of automotive microcontrollers. In this paper we analyze the existing correlation between fault injection experiments in an RTL microcontroller description and the information available at the ISS to enable accurate ISS-based fault injection.