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dc.contributor.authorRethinagiri, Santhosh Kumar
dc.contributor.authorPalomar Pérez, Óscar
dc.contributor.authorSobe, Anita
dc.contributor.authorYalcin, Gulay
dc.contributor.authorKnauth, Thomas
dc.contributor.authorTitos Gil, Rubén
dc.contributor.authorPrieto, Pablo
dc.contributor.authorSchneegaß, Malte
dc.contributor.authorCristal Kestelman, Adrián
dc.contributor.authorUnsal, Osman Sabri
dc.contributor.authorFelber, Pascal
dc.contributor.authorFetzer, Christof
dc.contributor.authorMilojevic, Dragomir
dc.contributor.otherUniversitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors
dc.date.accessioned2016-04-06T08:07:46Z
dc.date.available2017-11-30T01:30:17Z
dc.date.issued2015-11-01
dc.identifier.citationRethinagiri, S., Palomar, O., Sobe, Anita, Yalcin, G., Knauth, T., Titos, R., Prieto, P., Schneegaß, M., Cristal, A., Unsal, O., Felber, P., Fetzer, C., Milojevic, D. ParaDIME: Parallel distributed infrastructure for minimization of energy for data centers. "Microprocessors and microsystems", 01 Novembre 2015, vol. 39, núm. 8, p. 1174-1189.
dc.identifier.issn0141-9331
dc.identifier.urihttp://hdl.handle.net/2117/85255
dc.descriptionNOTICE: this is the author’s version of a work that was accepted for publication in "Microprocessors and Microsystems". Changes resulting from the publishing process, such as peer review, editing, corrections, structural formatting, and other quality control mechanisms may not be reflected in this document. Changes may have been made to this work since it was submitted for publication. A definitive version was subsequently published in: Microprocessors and Microsystems, Volume 39, Issue 8 (November 2015). doi:10.1016/j.micpro.2015.06.005
dc.description.abstractDramatic environmental and economic impact of the ever increasing power and energy consumption of modern computing devices in data centers is now a critical challenge. On the one hand, designers use technology scaling as one of the methods to face the phenomenon called dark silicon (only segments of a chip function concurrently due to power restrictions). On the other hand, designers use extreme-scale systems such as teradevices to meet the performance needs of their applications which in turn increases the power consumption of the platform. In order to overcome these challenges, we need novel computing paradigms that address energy efficiency. One of the promising solutions is to incorporate parallel distributed methodologies at different abstraction levels.; The FP7 project ParaDIME focuses on this objective to provide different distributed methodologies (software-hardware techniques) at different abstraction levels to attack the power-wall problem. In particular, the ParaDIME framework will utilize: circuit and architecture operation below safe voltage limits for drastic energy savings, specialized energy-aware computing accelerators, heterogeneous computing, energy-aware runtime, approximate computing and power-aware message passing. The major outcome of the project will be a noval processor architecture for a heterogeneous distributed system that utilizes future device characteristics, runtime and programming model for drastic energy savings of data centers. Wherever possible, ParaDIME will adopt multidisciplinary techniques, such as hardware support for message passing, runtime energy optimization utilizing new hardware energy performance counters, use of accelerators for error recovery from sub-safe voltage operation, and approximate computing through annotated code. Furthermore, we will establish and investigate the theoretical limits of energy savings at the device, circuit, architecture, runtime and programming model levels of the computing stack, as well as quantify the actual energy savings achieved by the ParaDIME approach for the complete computing stack with the real environment.
dc.format.extent16 p.
dc.language.isoeng
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/3.0/es/
dc.subjectÀrees temàtiques de la UPC::Informàtica::Arquitectura de computadors
dc.subject.lcshData processing service centers -- Energy consumption
dc.subject.otherLow power
dc.subject.otherRuntime energy optimization
dc.subject.otherProgramming models
dc.subject.otherError recovery
dc.subject.otherApproximate computing
dc.subject.otherMessage passing accelerators
dc.titleParaDIME: Parallel distributed infrastructure for minimization of energy for data centers
dc.typeArticle
dc.subject.lemacCentres informàtics -- Consum d'energia
dc.contributor.groupUniversitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions
dc.identifier.doi10.1016/j.micpro.2015.06.005
dc.description.peerreviewedPeer Reviewed
dc.relation.publisherversionhttp://www.sciencedirect.com/science/article/pii/S0141933115000848
dc.rights.accessOpen Access
local.identifier.drac17526737
dc.description.versionPostprint (author's final draft)
local.citation.authorRethinagiri, S.; Palomar, O.; Sobe, Anita; Yalcin, G.; Knauth, T.; Titos, R.; Prieto, P.; Schneegaß, M.; Cristal, A.; Unsal, O.; Felber, P.; Fetzer, C.; Milojevic, D.
local.citation.publicationNameMicroprocessors and microsystems
local.citation.volume39
local.citation.number8
local.citation.startingPage1174
local.citation.endingPage1189


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