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dc.contributor.authorÁlvarez Mesa, Mauricio
dc.contributor.authorRamírez Bellido, Alejandro
dc.contributor.authorAzevedo, Arnaldo
dc.contributor.authorMeenderinck, Cor
dc.contributor.authorJuurlink, Ben
dc.contributor.authorValero Cortés, Mateo
dc.contributor.otherUniversitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors
dc.date.accessioned2010-07-08T10:04:31Z
dc.date.available2010-07-08T10:04:31Z
dc.date.created2009-12-11
dc.date.issued2009-12-11
dc.identifier.citationAlvarez, M. [et al.]. Scalability of Macroblock-level parallelism for H.264 decoding. A: International Conference on Parallel and Distributed Systems. "The IEEE Fifteenth International Conference on Parallel and Distributed Systems (ICPADS-2009)". Shenzen: IEEE Computer Society Publications, 2010, p. 236-243.
dc.identifier.isbn978-1-4244-5788-5
dc.identifier.urihttp://hdl.handle.net/2117/8070
dc.description.abstractThis paper investigates the scalability of MacroBlock(MB) level parallelization of the H.264 decoder for High Definition (HD) applications. The study includes three parts. First, a formal model for predicting the maximum performance that can be obtained taking into account variable processing time of tasks and thread synchronization overhead. Second, an implementation on a real multiprocessor architecture including a comparison of different scheduling strategies and a profiling analysis for identifying the performance bottlenecks. Finally, a trace-driven simulation methodology has been used for identifying the opportunities of acceleration for removing the main bottlenecks. It includes the acceleration potential for the entropy decoding stage and thread synchronization and scheduling. Our study presents a quantitative analysis of the main bottlenecks of the application and estimates the acceleration levels that are required to make the MB-level parallel decoder scalable.
dc.format.extent8 p.
dc.language.isoeng
dc.publisherIEEE Computer Society Publications
dc.subjectÀrees temàtiques de la UPC::Informàtica::Arquitectura de computadors::Arquitectures paral·leles
dc.subject.lcshComputer networks -- Scalability
dc.subject.lcshH.264
dc.titleScalability of Macroblock-level parallelism for H.264 decoding
dc.typeConference report
dc.subject.lemacProcessament en paral·lel (Ordinadors) -- Arquitectura
dc.contributor.groupUniversitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions
dc.identifier.doi10.1109/ICPADS.2009.124
dc.description.peerreviewedPeer Reviewed
dc.rights.accessOpen Access
local.identifier.drac2573980
dc.description.versionPostprint (author’s final draft)
local.citation.authorAlvarez, M.; Ramirez, A.; Azevedo, A.; Meenderinck, C.; Juurlink, B.; Valero, M.
local.citation.contributorInternational Conference on Parallel and Distributed Systems
local.citation.pubplaceShenzen
local.citation.publicationNameThe IEEE Fifteenth International Conference on Parallel and Distributed Systems (ICPADS-2009)
local.citation.startingPage236
local.citation.endingPage243


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