Envíos recientes

  • Performance and Power Analysis of HPC Workloads on Heterogenous Multi-Node Clusters 

    Mantovani, Filippo; Calore, Enrico (MDPI, 2018-05-04)
    Artículo
    Acceso abierto
    Performance analysis tools allow application developers to identify and characterize the inefficiencies that cause performance degradation in their codes, allowing for application optimizations. Due to the increasing ...
  • On the tailoring of CAST-32A certification guidance to real COTS multicore architectures 

    Agirre, Irune; Abella, Jaume; Azkarate-Askasua, Mikel; Cazorla, Francisco J. (IEEE, 2018-03-12)
    Comunicación de congreso
    Acceso abierto
    The use of Commercial Off-The-Shelf (COTS) multicores in real-time industry is on the rise due to multicores' potential performance increase and energy reduction. Yet, the unpredictable impact on timing of contention in ...
  • Reconciling Time Predictability and Performance in Future Computing Systems 

    Cazorla, Francisco J.; Abella, Jaume; Mezzetti, Enrico; Hernandez, Carles; Vardanega, Tullio; Bernat, Guillem (IEEE, 2018-04)
    Artículo
    Acceso abierto
    MBTA studies the system’s timing in analysis scenarios, to determine upper bounds to the worst-case execution-time behavior that may occur at operation. MBTA’s challenge is to construct analysis-time scenarios that help ...
  • Automatic Generation of Workload Profiles Using Unsupervised Learning Pipelines 

    Buchaca Prats, David; Berral, Josep Ll.; Carrera, David (IEEE, 2018-03)
    Artículo
    Acceso abierto
    The complexity of resource usage and power consumption on cloud-based applications makes the understanding of application behavior through expert examination difficult. The difficulty increases when applications are seen ...
  • Execution time distributions in embedded safety-critical systems using extreme value theory 

    del Castillo, Joan; Padilla, Maria; Abella, Jaume; Cazorla, Francisco J. (Inderscience, 2017)
    Artículo
    Acceso restringido por política de la editorial
    Several techniques have been proposed to upper-bound the worst-case execution time behaviour of programs in the domain of critical real-time embedded systems. These computing systems have strong requirements regarding the ...
  • Transparent Orchestration of Task-based Parallel Applications in Containers Platforms 

    Ramon-Cortes, Cristian; Serven, Albert; Ejarque, Jorge; Lezzi, Daniele; Badia, Rosa M. (Springer Verlag, 2018-03)
    Artículo
    Acceso restringido por política de la editorial
    This paper presents a framework to easily build and execute parallel applications in container-based distributed computing platforms in a user-transparent way. The proposed framework is a combination of the COMP Superscalar ...
  • On the adequacy of lightweight thread approaches for high-level parallel programming models 

    Castelló, Adrián; Mayo, Rafael; Sala, Kevin; Beltran, Vicenç; Balaji, Pavan; Peña, Antonio J. (Elsevier, 2018-07)
    Artículo
    Acceso restringido por política de la editorial
    High-level parallel programming models (PMs) are becoming crucial in order to extract the computational power of current on-node multi-threaded parallelism. The most popular PMs, such as OpenMP or OmpSs, are directive-based: ...
  • Reducing memory requirements for large size LBM simulations on GPUs 

    Valero-Lara, Pedro (Wiley, 2017-12)
    Artículo
    Acceso restringido por política de la editorial
    The scientific community in its never-ending road of larger and more efficient computational resources is in need of more efficient implementations that can adapt efficiently on the current parallel platforms. Graphics ...
  • A fault-tolerant algorithm for distributed resource allocation 

    Pessolani, Pablo; Jara, Oscar; Gonnet, Silvio; Cortés, Toni; Tinetti, Fernando (2017-11-01)
    Artículo
    Acceso abierto
    Resource allocation is a usual problem that must be faced during a distributed system design. Despite the large number of algorithms proposed in literature to solve this problem, most papers lack of detailed descriptions ...
  • Hardware-Assisted Thread and Data Mapping in Hierarchical Multicore Architectures 

    Cruz, Eduardo H.M.; Diener, Matthias; Pilla, Laércio L.; Navaux, Philippe O.A. (Association for Computing Machinery (ACM), 2016-09-06)
    Artículo
    Acceso abierto
    The performance and energy efficiency of modern architectures depend on memory locality, which can be improved by thread and data mappings considering the memory access behavior of parallel applications. In this article, ...
  • The Hipster Approach for Improving Cloud System Efficiency 

    Nishtala, Rajiv; Carpenter, Paul; Petrucci, Vinicius; Martorell, Xavier (Association for Computing Machinery (ACM), 2017-12-03)
    Artículo
    Acceso abierto
    In 2013, U.S. data centers accounted for 2.2% of the country’s total electricity consumption, a figure that is projected to increase rapidly over the next decade. Many important data center workloads in cloud computing are ...
  • Efficient CFD code implementation for the ARM-based Mont-Blanc architecture 

    Oyarzun, G.; Borrell, Ricard; Gorobets, A.; Mantovani, Filippo; Oliva, A. (Elsevier, 2018-02)
    Artículo
    Acceso abierto
    Since 2011, the European project Mont-Blanc has been focused on enabling ARM-based technology for HPC, developing both hardware platforms and system software. The latest Mont-Blanc prototypes use system-on-chip (SoC) devices ...

Muestra más