L'objectiu global del grup de recerca és avançar en noves metodologies de disseny de circuits i sistemes electrònics i augmentar la seva qualitat, assegurant el correcte funcionament davant les variacions del procés i entorn i, fins i tot, davant atacs externs de maquinari. Els objectius de la investigació engloben tres dominis. El primer es centra en l'avanç de les tècniques de disseny de circuits de baixa potència i sistemes de tecnologies CMOS nanomètriques. El segon domini persegueix l'augment de la qualitat funcional, la innovació en els mètodes de control, auto-test i anàlisi d'integritat dels senyals analògics, digitals i de senyal mixta. Finalment, les estratègies de detecció contra atacs físics externs conformen el tercer objectiu de recerca del Grup

http://futur.upc.edu/QINE

Enviaments recents

  • Design and validation of a platform for electromagnetic fault injection 

    Balasch, Josep; Arumi Delgado, Daniel; Manich Bou, Salvador (Institute of Electrical and Electronics Engineers (IEEE), 2018)
    Text en actes de congrés
    Accés obert
    Security is acknowledged as one of the main challenges in the design and deployment of embedded circuits. Devices need to operate on-the-field safely and correctly, even when at physical reach of potential adversaries. One ...
  • Crypto-test-lab for security validation of ECC co-processor test infrastructure 

    Lupón Roses, Emilio; Rodríguez Montañés, Rosa; Manich Bou, Salvador (Institute of Electrical and Electronics Engineers (IEEE), 2018)
    Text en actes de congrés
    Accés obert
    Elliptic Curve Cryptography (ECC) is a technology for public-key cryptography that is becoming increasingly popular because it provides greater speed and implementation compactness than other public-key technologies. ...
  • The low area probing detector as a countermeasure against invasive attacks 

    Weiner, Michael; Manich Bou, Salvador; Rodríguez Montañés, Rosa; Sigl, Georg (2017-11-07)
    Article
    Accés obert
    Microprobing allows intercepting data from on-chip wires as well as injecting faults into data or control lines. This makes it a commonly used attack technique against security-related semiconductors, such as smart card ...
  • Análisis del retardo en enlaces con protocolos ARQ y control de flujo: aplicación a una red estrella 

    Rubio Sola, Jose Antonio; Figueras Pàmies, Joan (Marcombo, 1983)
    Text en actes de congrés
    Accés obert
    El objetivo de este trabajo se enmarca en el desarrollo de herramientas de cuantificación de los tiempos de retardo en redes de computadores. El análisis se ha centrado en la evaluación del tiempo medio de retardo en el ...
  • RRAM Based Random Bit Generation for Hardware Security Applications 

    Arumi Delgado, Daniel; Rodríguez Montañés, Rosa; Manich Bou, Salvador; Pehl, Michael (Institute of Electrical and Electronics Engineers (IEEE), 2016)
    Text en actes de congrés
    Accés obert
    Resistive random access memories (RRAMs) have arisen as a competitive candidate for non-volatile memories due to their scalability, simple structure, fast switching speed and compatibility with conventional back-end ...
  • RRAM serial configuration for the generation of random bits 

    Arumi Delgado, Daniel; Gonzalez, Mireia B.; Campabadal, Francesca (2017-06-25)
    Article
    Accés restringit per política de l'editorial
  • Defending cache memory against cold-boot attacks boosted by power or EM radiation analysis 

    Neagu, Madalin; Manich Bou, Salvador (2017-04)
    Article
    Accés restringit per política de l'editorial
    Some algorithms running with compromised data select cache memory as a type of secure memory where data is confined and not transferred to main memory. However, cold-boot attacks that target cache memories exploit the data ...
  • Multi-directional space tessellation to improve the decision boundary in indirect mixed-signal testing 

    Gómez Pau, Álvaro; Balado Suárez, Luz María; Figueras Pàmies, Joan (2017-02-20)
    Article
    Accés restringit per política de l'editorial
    One of the most challenging aspects in nowadays microelectronics industry is production test and verification of mixed-signal circuits. In order to cope with some of the drawbacks encountered in this scenario, researchers ...
  • Criteria for selecting a subset of indirect measurements for analog testing 

    Gómez Pau, Álvaro; Balado Suárez, Luz María; Figueras Pàmies, Joan (2016)
    Text en actes de congrés
    Accés restringit per política de l'editorial
    This work proposes a criterion to select a subset of indirect measurements avoiding redundant information. The key idea of the proposal is to reduce the actual number of measurements to be performed to those strictly ...
  • Indirect test of M-S circuits using multiple specification band guarding 

    Gómez Pau, Álvaro; Balado Suárez, Luz María; Figueras Pàmies, Joan (2016-09-01)
    Article
    Accés obert
    Testing analog and mixed-signal circuits is a costly task due to the required test time targets and high end technical resources. Indirect testing methods partially address these issues providing an efficient solution using ...
  • Improving indirect test efficiency using multi-directional tessellations in the measure space 

    Gómez Pau, Álvaro; Balado Suárez, Luz María; Figueras Pàmies, Joan (Institute of Electrical and Electronics Engineers (IEEE), 2016)
    Text en actes de congrés
    Accés restringit per política de l'editorial
    Indirect test strategies have risen as a promising solution to overcome the challenges encountered in analog and mixed-signal circuit testing and the ever increasing device verification costs. This work explores the ...
  • RRAM based cell for hardware security applications 

    Arumi Delgado, Daniel; Manich Bou, Salvador; Rodríguez Montañés, Rosa (2016)
    Text en actes de congrés
    Accés restringit per política de l'editorial
    Resistive random access memories (RRAMs)have arisen as a competitive candidate for non-volatile memories due to their scalability, simple structure, fast switching speed and compatibility with conventional back-end processes. ...

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