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dc.contributor.authorCastillo, Raúl
dc.contributor.authorArumi Delgado, Daniel
dc.contributor.authorRodríguez Montañés, Rosa
dc.contributor.otherUniversitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica
dc.date.accessioned2015-10-14T14:41:39Z
dc.date.issued2014
dc.identifier.citationCastillo, R., Arumi, D., Rodriguez, R. Resistive open defect characteritzation in 3D 6T SRAM memories. A: Conference on Design of Circuits and Integrated Systems. "Proceedings XXIX Conference on Design of Circuits and Integrated Systems". Madrid: 2014, p. 1-6.
dc.identifier.urihttp://hdl.handle.net/2117/77724
dc.description.abstractThe relentless decrease in feature size and the increase of density requirements in Integrated Circuit (IC) manufacturing arise new challenges that must be overcome. One of the most promising alternatives is three-dimensional integrated circuits (3D ICs). Several possibilities have been presented, but one of the clearest options is based on the use of Though-Silicon Vias (TSV) connections. The benefits and disadvantages that TSV inclusion adds to design need further studies. The implementation of these vertical vias can affect the general performance of circuit and thus changing verification strategies or testing processes. In this paper, the electrical effect of open defects affecting TSVs in a 3D SRAM module is presented. Analytical expressions are presented to provide designers a tool to improve circuit features and help them in the analysis of how TSV implementation can affect a SRAM array design
dc.format.extent6 p.
dc.language.isoeng
dc.subjectÀrees temàtiques de la UPC::Enginyeria electrònica
dc.subject.lcshModeling
dc.titleResistive open defect characteritzation in 3D 6T SRAM memories
dc.typeConference report
dc.subject.lemacModelatge -- Congressos
dc.contributor.groupUniversitat Politècnica de Catalunya. QINE - Disseny de Baix Consum, Test, Verificació i Circuits Integrats de Seguretat
dc.rights.accessRestricted access - publisher's policy
local.identifier.drac16869594
dc.description.versionPostprint (author’s final draft)
dc.date.lift10000-01-01
local.citation.authorCastillo, R.; Arumi, D.; Rodriguez, R.
local.citation.contributorConference on Design of Circuits and Integrated Systems
local.citation.pubplaceMadrid
local.citation.publicationNameProceedings XXIX Conference on Design of Circuits and Integrated Systems
local.citation.startingPage1
local.citation.endingPage6


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