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Synchronous digital implementation of the AER communication scheme for emulating large-scale spiking neural networks models
dc.contributor.author | Moreno Aróstegui, Juan Manuel |
dc.contributor.author | Madrenas Boadas, Jordi |
dc.contributor.author | Kotynia, L. |
dc.contributor.other | Universitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica |
dc.date.accessioned | 2010-03-19T15:55:46Z |
dc.date.available | 2010-03-19T15:55:46Z |
dc.date.created | 2009-08 |
dc.date.issued | 2009-08 |
dc.identifier.citation | Moreno, J.; Madrenas, J.; Kotynia, L. Synchronous digital implementation of the AER communication scheme for emulating large-scale spiking neural networks models. A: NASA/ESA Conference on Adaptive Hardware and Systems. "2009 NASA/ESA Conference on Adaptive Hardware and Systems". San Francisco, CA: IEEE Computer Society Publications, 2009, p. 189-196. |
dc.identifier.isbn | 978-0-7695-3714-6 |
dc.identifier.uri | http://hdl.handle.net/2117/6725 |
dc.description.abstract | In this paper we shall present a fully synchronous digital implementation of the Address Event Representation (AER) communication scheme that has been used in the PERPLEXUS chip in order to permit the emulation of large-scale biologically inspired spiking neural networks models. By introducing specific commands in the AER protocol it is possible to distribute the AER bus among a large number of chips where the functionality of the spiking neurons is being emulated. A careful design of the AER encoder module using compact Content Addressable Memories (CAMs) allows for a feasible realization of large-scale models. |
dc.format.extent | 8 p. |
dc.language.iso | eng |
dc.publisher | IEEE Computer Society Publications |
dc.subject | Àrees temàtiques de la UPC::Enginyeria electrònica |
dc.subject.lcsh | Neural networks |
dc.title | Synchronous digital implementation of the AER communication scheme for emulating large-scale spiking neural networks models |
dc.type | Conference report |
dc.subject.lemac | Electrònica |
dc.contributor.group | Universitat Politècnica de Catalunya. AHA - Arquitectures Hardware Avançades |
dc.identifier.doi | 10.1109/AHS.2009.14 |
dc.rights.access | Open Access |
local.identifier.drac | 2358785 |
dc.description.version | Postprint (published version) |
local.citation.author | Moreno, J.; Madrenas, J.; Kotynia, L. |
local.citation.contributor | NASA/ESA Conference on Adaptive Hardware and Systems |
local.citation.pubplace | San Francisco, CA |
local.citation.publicationName | 2009 NASA/ESA Conference on Adaptive Hardware and Systems |
local.citation.startingPage | 189 |
local.citation.endingPage | 196 |