Synchronous digital implementation of the AER communication scheme for emulating large-scale spiking neural networks models
Document typeConference report
PublisherIEEE Computer Society Publications
Rights accessOpen Access
In this paper we shall present a fully synchronous digital implementation of the Address Event Representation (AER) communication scheme that has been used in the PERPLEXUS chip in order to permit the emulation of large-scale biologically inspired spiking neural networks models. By introducing specific commands in the AER protocol it is possible to distribute the AER bus among a large number of chips where the functionality of the spiking neurons is being emulated. A careful design of the AER encoder module using compact Content Addressable Memories (CAMs) allows for a feasible realization of large-scale models.
CitationMoreno, J.; Madrenas, J.; Kotynia, L. Synchronous digital implementation of the AER communication scheme for emulating large-scale spiking neural networks models. A: NASA/ESA Conference on Adaptive Hardware and Systems. "2009 NASA/ESA Conference on Adaptive Hardware and Systems". San Francisco, CA: IEEE Computer Society Publications, 2009, p. 189-196.
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