Show simple item record

dc.contributor.authorCastillo, Pedro Angel
dc.contributor.authorMerelo, Juan Julián
dc.contributor.authorMoreto Planas, Miquel
dc.contributor.authorCazorla Almeida, Francisco Javier
dc.contributor.authorValero Cortés, Mateo
dc.contributor.authorMora, Antonio
dc.contributor.authorLaredo, Juan Luís
dc.contributor.authorMcKee, Sally
dc.contributor.otherUniversitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors
dc.date.accessioned2010-03-01T10:49:24Z
dc.date.available2010-03-01T10:49:24Z
dc.date.created2008-06
dc.date.issued2008-06
dc.identifier.citationCastillo, P. [et al.]. Evolutionary system for prediction and optimization of hardware architecture performance. A: IEEE Congress on Evolutionary Computation 2008. "2008 IEEE Congress on Evolutionary Computation (IEEE World Congress on Computational Intelligence)". Hong Kong: 2008, p. 1941-1948.
dc.identifier.isbn978-1-4244-1823-7
dc.identifier.urihttp://hdl.handle.net/2117/6508
dc.description.abstractThe design of computer architectures is a very complex problem. The multiple parameters make the number of possible combinations extremely high. Many researchers have used simulation, although it is a slow solution since evaluating a single point of the search space can take hours. In this work we propose using evolutionary multilayer perceptron (MLP) to compute the performance of an architecture parameter settings. Instead of exploring the search space, simulating many configurations, our method randomly selects some architecture configurations; those are simulated to obtain their performance, and then an artificial neural network is trained to predict the remaining configurations performance. Results obtained show a high accuracy of the estimations using a simple method to select the configurations we have to simulate to optimize the MLP. In order to explore the search space, we have designed a genetic algorithm that uses the MLP as fitness function to find the niche where the best architecture configurations (those with higher performance) are located. Our models need only a small fraction of the design space, obtaining small errors and reducing required simulation by two orders of magnitude.
dc.format.extent8 p.
dc.language.isoeng
dc.subjectÀrees temàtiques de la UPC::Informàtica::Arquitectura de computadors
dc.subject.lcshEvolutionary computation
dc.subject.lcshNeural networks (Computer science)
dc.subject.lcshComputer architecture
dc.subject.otherMultilayer perceptrons
dc.titleEvolutionary system for prediction and optimization of hardware architecture performance
dc.typeConference report
dc.subject.lemacProgramació evolutiva (Informàtica)
dc.subject.lemacXarxes neuronals (Informàtica)
dc.contributor.groupUniversitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions
dc.identifier.doi10.1109/CEC.2008.4631054
dc.description.peerreviewedPeer Reviewed
dc.relation.publisherversionhttp://ieeexplore.ieee.org/document/4631054/
dc.rights.accessOpen Access
drac.iddocument2454077
dc.description.versionPostprint (published version)
upcommons.citation.authorCastillo, P.; Merelo, J.; Moretó, M.; Cazorla, F.; Valero, M.; Mora, A.; Laredo, J.; McKee, S.
upcommons.citation.contributorIEEE Congress on Evolutionary Computation 2008
upcommons.citation.pubplaceHong Kong
upcommons.citation.publishedtrue
upcommons.citation.publicationNameIEEE Congress on Evolutionary Computation 2008
upcommons.citation.startingPage1941
upcommons.citation.endingPage1948


Files in this item

Thumbnail

This item appears in the following Collection(s)

Show simple item record

All rights reserved. This work is protected by the corresponding intellectual and industrial property rights. Without prejudice to any existing legal exemptions, reproduction, distribution, public communication or transformation of this work are prohibited without permission of the copyright holder