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Acceleration of Complex Algorithms on a Fast Reconfigurable Embedded System on Spartan-3
dc.contributor.author | Canto Navarro, Enrique Fernando |
dc.contributor.author | Fons, Mariano |
dc.contributor.author | López García, Mariano |
dc.contributor.author | Ramos Lara, Rafael Ramón |
dc.contributor.other | Universitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica |
dc.date.accessioned | 2010-01-11T10:56:38Z |
dc.date.available | 2010-01-11T10:56:38Z |
dc.date.created | 2009 |
dc.date.issued | 2009 |
dc.identifier.citation | Canto, E. [et al.]. Acceleration of Complex Algorithms on a Fast Reconfigurable Embedded System on Spartan-3. A: International Conference on Field Programmable Logic and Applications. "19th International Conference on Field Programmable Logic and Applications". Prague: 2009, p. 429-434. |
dc.identifier.isbn | 978-1-4244-3892-1 |
dc.identifier.uri | http://hdl.handle.net/2117/6140 |
dc.description.abstract | Complex algorithms usually require several computation stages. Many embedded microprocessors have not enough computational performance to resolve these algorithms in a reasonable time, so dedicated coprocessors accelerate them although the main drawback is the area devoted to them. A reconfigurable coprocessor can drastically reduce the area, since it accommodates a set of coprocessors whose execution is multiplexed on time, although the reconfiguration speed reduces the overall system performance. Although self-reconfigurable systems are possible on Spartan-3 FPGAs, it requires a hard design task due to the lack of software and hardware support available on higher-cost families. This paper describes the architecture of a fast self-reconfigurable embedded system mapped on Spartan-3, used as computation platform to solve a complex algorithm, such as the image-processing carried out in a fingerprint biometric algorithm. In order to reduce the reconfiguration time, the system uses our custom-made memory and reconfiguration controllers. Moreover, the dynamic coprocessor can access directly to external memory through our memory controller to improve processing time. |
dc.format.extent | 6 p. |
dc.language.iso | eng |
dc.rights | Attribution-NonCommercial-NoDerivs 3.0 Spain |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/3.0/es/ |
dc.subject | Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors |
dc.subject | Àrees temàtiques de la UPC::Enginyeria electrònica::Microelectrònica |
dc.subject.lcsh | Field programmable gate arrays |
dc.title | Acceleration of Complex Algorithms on a Fast Reconfigurable Embedded System on Spartan-3 |
dc.type | Conference report |
dc.subject.lemac | Arquitectura d'ordinadors -- Congressos |
dc.subject.lemac | Microprocessadors -- Congressos |
dc.contributor.group | Universitat Politècnica de Catalunya. SARTI - Centre de Desenvolupament Tecnològic de Sistemes d'Adquisició Remota i Tractament de la Informació |
dc.description.peerreviewed | Peer Reviewed |
dc.relation.publisherversion | http://fpl2009.org/ |
dc.rights.access | Open Access |
local.identifier.drac | 2377577 |
dc.description.version | Postprint (published version) |
local.citation.author | Canto, E.; Fons, M.; Lopez, M.; Ramos, R. |
local.citation.contributor | International Conference on Field Programmable Logic and Applications |
local.citation.pubplace | Prague |
local.citation.publicationName | 19th International Conference on Field Programmable Logic and Applications |
local.citation.startingPage | 429 |
local.citation.endingPage | 434 |