Reports de recerca
Recent Submissions
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Semi-analytic discrete time model of a 1-stage CC-CP
(2019-11-20)
Research report
Open AccessThis paper employs a linear, discrete-time State- Space model of a CMOS Cross-Coupled Charge Pump (CCCP.) The discrete-time model is based on the analytic solution of the differential equations at each semi-period. This ... -
Process variability in sub-16nm bulk CMOS technology
(2012-03-01)
Research report
Open AccessThe document is part of deliverable D3.6 of the TRAMS Project (EU FP7 248789), of public nature, and shows and justifies the levels of variability used in the research project for sub-18nm bulk CMOS technologies. -
Dynamic fine-grain body biasing of caches with latency and leakage 3T1D-based monitors
(2011-04-15)
Research report
Open AccessIn this paper, we propose a dynamically tunable fine-grain body biasing mechanism to reduce active & standby leakage power in caches under process variations. -
On the effectiveness of hybrid mechanisms on reduction of parametric failures in caches
(2011-12-05)
Research report
Restricted access - publisher's policyIn this paper, we provide an insight on the different proactive read/write assist methods (wordline boosting & adaptive body biasing) that help in preventing (and reducing) parametric failures when coupled with reactive ... -
vPROBE: Variation aware post-silicon power/performance binning using embedded 3T1D cells
(2010-09-05)
Research report
Open AccessIn this paper, we present an on-die post-silicon binning methodology that takes into account the effect of static and dynamic variations and categorizes every processor based on power/performance.The proposed scheme is ... -
FOCSI: A new layout regularity metric
(2009-06-09)
Research report
Open AccessDigital CMOS Integrated Circuits (ICs) suffer from serious layout features printability issues associated to the lithography manufacturing process. Regular layout designs are emerging as alternative solutions to reduce ... -
THERMAL OBSERVATION OF A MODULATED INPUT FOR A 2.5GHZ CMOS POWER AMPLIFIER Part 3: PA+Sensor layout integration and PVT analysis
(2011-05-16)
Research report
Restricted access - publisher's policyThe objective is to detect the impact of PVT variations (Process, Voltage and Temperature variations) on the figures of merit of a device. -
THERMAL OBSERVATION OF A MODULATED INPUT FOR A 2.5GHZ CMOS POWER AMPLIFIER Part 2: Temperature Sensor
(2011-04-25)
Research report
Restricted access - publisher's policyThe temperature sensor used is based on the usual two bipolar transistors temperature sensor with some modifications to allow for external calibration (or “re-centering”). -
THERMAL OBSERVATION OF A MODULATED INPUT FOR A 2.5GHZ CMOS POWER AMPLIFIER Part 1: Feasibility study
(2011-03-02)
Research report
Restricted access - publisher's policyIn this Project, the verification of the possibility of extraction of information of a modulated signal through no-invasive thermal measurements is done. The main objective is that using a non-invasive thermal technique, ... -
CATRENE-PANAMA project review November 2010
(2010-11-23)
Research report
Restricted access - confidentiality agreementInforme de progrés del projecte Europeu CATRENE-PANAMA sobre les tasques desenvolupades per el grup de recerca HiPICS de la UPC -
Inforrme de la segona anualitat del projecte CATRENE-PANAMA per al programa AVANZA I+D
(2011-03-16)
Research report
Restricted access - confidentiality agreementInforme de les tasques i activitats desenvolupades al projecte europeu CATRENE-PANAMA durant l'any 2010 per el grup de recerca de la UPC HiPICS -
CATRENE-PANAMA project review June 2010
(2010-06-03)
Research report
Restricted access - confidentiality agreementInforme de progrés del projecte Europeu CATRENE-PANAMA sobre les tasques desenvolupades per el grup de recerca HiPICS de la UPC
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