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Acceleration of synthetic aperture radar for on-board space systems

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HPEC_2023.pdf (4,021Mb)
 
10.1109/HPEC58863.2023.10363508
 
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hdl:2117/405054

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Solé i Bonet, MarcMés informacióMés informació
Rodríguez Ferrández, IvánMés informació
Steenari, David
Kosmidis, LeonidasMés informació
Document typeConference report
Defense date2023
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Rights accessOpen Access
All rights reserved. This work is protected by the corresponding intellectual and industrial property rights. Without prejudice to any existing legal exemptions, reproduction, distribution, public communication or transformation of this work are prohibited without permission of the copyright holder
ProjectMETASAT - MODULAR MODEL-BASED DESIGN AND TESTING FOR APPLICATIONS IN SATELLITES (EC-HE-101082622)
BSC - COMPUTACION DE ALTAS PRESTACIONES VIII (AEI-PID2019-107255GB-C21)
Abstract
There is an increasing trend in modern space systems to move processing that until now was transmitted to ground for processing, on board the satellite. Synthetic Aperture Radar (SAR) is an example of such processing. However, such a computationally intensive task requires high performance hardware. In this paper we present the CPU and GPU acceleration of an on-board SAR processing application, part of ESA's open source benchmarking suite OBPMark. We benchmark several embedded multicore and GPU platforms which are promising candidates for future on-board systems. Our results show that both embedded multicores and especially GPUs can provide significant speedups in this type of processing, and can achieve performance levels similar to the ones of high performance ground stations.
CitationSolé, M. [et al.]. Acceleration of synthetic aperture radar for on-board space systems. A: IEEE High Performance Extreme Computing Conference. "2023 IEEE High Performance Extreme Computing virtual conference: virtual, September 25-29, 2023". Institute of Electrical and Electronics Engineers (IEEE), 2023. ISBN 979-8-3503-0860-0. DOI 10.1109/HPEC58863.2023.10363508. 
URIhttp://hdl.handle.net/2117/405054
DOI10.1109/HPEC58863.2023.10363508
ISBN979-8-3503-0860-0
Publisher versionhttps://ieeexplore.ieee.org/document/10363508
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  • Doctorat en Arquitectura de Computadors - Ponències/Comunicacions de congressos [349]
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