A Fixed-Frequency Quasi-Sliding Control Algorithm: Application to Power Inverters Design by Means of FPGA Implementation

View/Open
Document typeArticle
Defense date2003-01-31
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Rights accessOpen Access
Abstract
In this paper a fixed-frequency quasi-sliding control algorithm based on switching surface zero averaged dynamics (ZAD) is reported. This algorithm is applied to the design of a Buck-based inverter, and implemented in a laboratory prototype by means of a field programmable gate array (FPGA), taking into account processing speed versus computational complexity trade-off. Three control laws, namely sliding control (SC), fixed-frequency quasi-sliding ZAD and PWM-based control have been experimentally tested to highlight the features of the proposed algorithm. According to the experimental results presented in the paper, the ZAD algorithm fulfills the requirement of fixed switching frequency and exhibits similar robustness properties in the presence of perturbations to those of sliding control mode.
CitationRamos, R.; Biel, D.; Fossas, E.; Guinjoan, F. "A Fixed-Frequency Quasi-Sliding Control Algorithm: Application to Power Inverters Design by Means of FPGA Implementation". IEEE Transactions on Power Electronics, 2003, Vol. 18, No. 1, p. 344-355.
ISSN0885-8993
Publisher versionhttp://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=1187453
Files | Description | Size | Format | View |
---|---|---|---|---|
IEEE_A_fixed_frequency.pdf | 1,091Mb | View/Open |
All rights reserved. This work is protected by the corresponding intellectual and industrial
property rights. Without prejudice to any existing legal exemptions, reproduction, distribution, public
communication or transformation of this work are prohibited without permission of the copyright holder