Departament d'Arquitectura de Computadors

Enviaments recents

  • Migration planning from elastic optical networks to spectrally-spatially flexible optical networks 

    Lechowicz, Piotr; Rumipamba Zambrano, Rubén Darío; Perelló Muntan, Jordi; Spadaro, Salvatore; Walkowiak, Krzysztof (Institute of Electrical and Electronics Engineers (IEEE), 2018)
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    Accés obert
    We focus on a migration planning from elastic to spectrally-spatially flexible optical networks by upgrading regular with SDM-capable ROADMs. Our most promising strategy reveals that by migrating 30% of the regular ROADMs ...

  • Advances in the Hierarchical Emergent Behaviors (HEB) approach to autonomous vehicles 

    Roca, Damian; Milito, Rodolfo; Nemirovsky, Mario; Valero Cortés, Mateo (2018-11-13)
    Article
    Accés obert
    Widespread deployment of autonomous vehicles (AVs) presents formidable challenges in terms on handling scalability and complexity, particularly regarding vehicular reaction in the face of unforeseen corner cases. Hierarchical ...

  • Cross-modal embeddings for video and audio retrieval 

    Surís Coll-Vinent, Dídac; Duarte, Amanda; Salvador Aguilera, Amaia; Torres Viñals, Jordi; Giró Nieto, Xavier (Springer, 2019)
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    In this work, we explore the multi-modal information provided by the Youtube-8M dataset by projecting the audio and visual features into a common feature space, to obtain joint audio-visual embeddings. These links are used ...

  • Checking signal transition graph implementability by symbolic bdd traversal 

    Kondratyev, Alex; Cortadella, Jordi; Kishinevsky, Michael; Pastor Llorens, Enric; Roig Mansilla, Oriol; Yakovlev, Alex (Institute of Electrical and Electronics Engineers (IEEE), 1995)
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    This paper defines conditions for a Signal Transition Graph to be implemented by an asynchronous circuit. A hierarchy of the implementability classes is presented. Our main concern is the implementability of the specification ...

  • A new look at the conditions for the synthesis of speed-independent circuits 

    Pastor Llorens, Enric; Cortadella, Jordi; Roig Mansilla, Oriol (Institute of Electrical and Electronics Engineers (IEEE), 1995)
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    This paper presents a set of sufficient conditions for the gate-level synthesis of speed-independent circuits when constrained to a given class of gate library. Existing synthesis methodologies are restricted to architectures ...

  • Hierarchical gate-level verification of speed-independent circuits 

    Roig Mansilla, Oriol; Cortadella, Jordi; Pastor Llorens, Enric (Institute of Electrical and Electronics Engineers (IEEE), 1995)
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    This paper presents a method for the verification of speed-independent circuits. The main contribution is the reduction of the circuit to a set of complex gates that makes the verification time complexity depend only on ...

  • Exploring the capabilities of support vector machines in detecting silent data corruptions 

    Subasi, Omer; Di, Sheng; Bautista-Gomez, Leonardo; Balaprakash, Prasanna; Unsal, Osman Sabri; Labarta Mancho, Jesús José; Cristal Kestelman, Adrián; Krishnamoorthy, Sriram; Cappello, Franck (Elsevier, 2018-09)
    Article
    Accés restringit per política de l'editorial
    As the exascale era approaches, the increasing capacity of high-performance computing (HPC) systems with targeted power and energy budget goals introduces significant challenges in reliability. Silent data corruptions ...

  • Technological volunteering as an approach for service learning 

    Sánchez Carracedo, Fermín; López Álvarez, David; Marqués Soriano, Emiliana; Vendrell Sarroca, Eva; Ortega Roig, Xavier (European Society for Engineering Education (SEFI), 2018)
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    Accés restringit per política de l'editorial
    Entities with social purposes perform an essential task in our Society. They are often obliged to work with insufficient budgets that do not allow them to develop their projects with the necessary guarantees. In particular, ...

  • High-level synthesis of asynchronous systems: Scheduling and process synchronization 

    Badia Sala, Rosa Maria; Cortadella, Jordi (Institute of Electrical and Electronics Engineers (IEEE), 1993)
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    Basic concepts for scheduling algorithms and control synthesis in high-level synthesis of asynchronous circuits are defined. Two scheduling strategies are presented and evaluated. Experiments on different benchmarks show ...

  • An efficient unique state coding algorithm for signal transition graphs 

    Pastor Llorens, Enric; Cortadella, Jordi (Institute of Electrical and Electronics Engineers (IEEE), 1993)
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    Current algorithms to force the complete state coding (CSC) property for signal transition graphs work on the state graph and, therefore require exponential time and space. Polynomial algorithms have been only proposed for ...

  • Polynomial algorithms for the synthesis of hazard-free circuits from signal transition graphs 

    Pastor Llorens, Enric; Cortadella, Jordi (Institute of Electrical and Electronics Engineers (IEEE), 1993)
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    Methods for the synthesis of asynchronous circuits from signal transition graphs (STGs) have commonly used the state graph to solve the two main steps of this process: the state assignment problem and the generation of ...

  • Terahertz dielectric resonator antenna coupled to graphene plasmonic dipole 

    Hosseininejad, Seyed Ehsan; Neshat, Mohammad; Faraji-Dana, Reza; Abadal Cavallé, Sergi; Lemme, Max; Bolívar, Peter Haring; Alarcón Cot, Eduardo José; Cabellos Aparicio, Alberto (Institute of Electrical and Electronics Engineers (IEEE), 2018)
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    Accés restringit per política de l'editorial
    This paper presents an efficient approach for exciting a dielectric resonator antenna (DRA) in the terahertz frequencies by means of a graphene plasmonic dipole. Design and analysis are performed in two steps. First, the ...

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