DTexL: Decoupled raster pipeline for texture locality
Visualitza/Obre
10.1109/MICRO56248.2022.00028
Inclou dades d'ús des de 2022
Cita com:
hdl:2117/376016
Tipus de documentText en actes de congrés
Data publicació2022
EditorInstitute of Electrical and Electronics Engineers (IEEE)
Condicions d'accésAccés obert
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ProjecteCoCoUnit - CoCoUnit: An Energy-Efficient Processing Unit for Cognitive Computing (EC-H2020-833057)
ARQUITECTURAS DE DOMINIO ESPECIFICO PARA SISTEMAS DE COMPUTACION ENERGETICAMENTE EFICIENTES (AEI-PID2020-113172RB-I00)
ARQUITECTURAS DE DOMINIO ESPECIFICO PARA SISTEMAS DE COMPUTACION ENERGETICAMENTE EFICIENTES (AEI-PID2020-113172RB-I00)
Abstract
Contemporary GPU architectures have multiple shader cores and a scheduler that distributes work (threads) among them, focusing on load balancing. These load balancing techniques favor thread distributions that are detrimental to texture memory locality for graphics applications in the L1 Texture Caches. Texture memory accesses make up the majority of the traffic to the memory hierarchy in typical low power graphics architectures. This paper focuses on improving the L1 Texture cache locality by focusing on a new workload scheduler by exploring various methods to group the threads, assign the groups to shader cores and also to reorder threads without violating the correctness of the pipeline. To overcome the resulting load imbalance, we also propose a minor modification in the GPU architecture that helps translate the improvement in cache locality to an improvement in the GPU’s performance. We propose DTexL that envelops these ideas and evaluate it over a benchmark suite of ten commercial games, to obtain a 46.8% decrease in L2 Accesses, a 19.3% increase in performance and a 6.3% decrease in total GPU energy. All this with a negligible overhead.
Descripció
© 2022 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes,creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. http://dx.doi.org/10.1109/MICRO56248.2022.00028
CitacióJoseph, D. [et al.]. DTexL: Decoupled raster pipeline for texture locality. A: Annual IEEE/ACM International Symposium on Microarchitecture. "2022 55th Annual IEEE/ACM International Symposium on Microarchitecture: 1-5 October 2022, Chicago, Illinois: proceedings". Institute of Electrical and Electronics Engineers (IEEE), 2022, p. 213-227. ISBN 978-1-6654-6272-3. DOI 10.1109/MICRO56248.2022.00028.
ISBN978-1-6654-6272-3
Versió de l'editorhttps://ieeexplore.ieee.org/document/9923874
Fitxers | Descripció | Mida | Format | Visualitza |
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DTexL_Paper_camera_ready_submitted.pdf | 7,239Mb | Visualitza/Obre |