SynFull-RTL: evaluation methodology for RTL NoC designs
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
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SynFull is a widely employed tool that generates realistic traffic patterns for the performance evaluation of a NoC. In this work, we identify the main limitations of SynFull: high variability and long simulation time and also that these limitations increase when SynFull is integrated with RTL designs. SynFull-RTL employs a statistical approach, simulating each application macro-phase only once and averaging according to its probability of occurrence and the measured traffic load. SynFull-RTL obtains higher accuracy than the original version and reduced variability, with observed 40× reduction in simulation time and resources. A use-case with ProSMART validates the results.
CitationLeyva, N.; Monemi, A.; Vallejo-Gutiérrez, E. SynFull-RTL: evaluation methodology for RTL NoC designs. "IEEE design & test", Desembre 2022, vol. 39, núm, 6, p. 58-69.