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dc.contributor.authorValero Cortés, Mateo
dc.date.accessioned2022-07-08T08:02:00Z
dc.date.available2022-09-01T10:24:06Z
dc.date.issued2022-05
dc.identifier.citationValero Cortés, M. K1 - Supercomputers and European Sovereignty ... A: 27th IEEE European Test Symposium (ETS). 2022,
dc.identifier.urihttp://hdl.handle.net/2117/372171
dc.description.abstractOver that last 3 decades, we have witnessed a transition from closed software ecosystems being the foundation for HPC, enterprise, and business to open source software ecosystems based on Linux: from Arduino in the IoT space, to Android in the mobile space to Linux in HPC and cloud-based systems with various Open Source Software projects built on top. However, when examining hardware, current commercial off the shelf solutions are closed hardware ecosystems that only enable integration at the peripheral (PCIe) level. The combination of current technology trends, the slowing of Moore’s Law, and cost prohibitive silicon manufacturing inhibit significant power-performance gains by relying on traditional closed ecosystems, especially in HPC, technology pushed to the extreme. This new regime forces systems to be much more specialized to achieve the power-performance profiles required for a supercomputer. In the past, HPC has led the way forward, defining the bleeding edge of technology. HPC can do this again with open hardware, as it has done in software with adopting Linux and open source in general. This is not only a technology imperative, but one born out of current geopolitics. Digital Technology (the generation and processing of data) is the basis for global commerce, scientific discovery, and ubiquitous in modern life. Thus, creation of digital technology in the form of processors, accelerators and the related digital infrastructure guarantees access to these building blocks of the digital economy regardless of the geopolitical environment. Given this technology and geopolitical backdrop, we describe how Europe can exploit its resources targeting research and development for technological independence. In this today’s technology environment, some of the rules have changed. This has produced a shift from abundant transistors to efficient use of transistors. Thus, to truly meet the power and performance requirements, we must specialize the hardware. At the same time, the software stack is evolving, becoming more abstract, enabling higher programmer productivity, but sacrificing hardware efficiency. Thus, application owners will need to co-design the full stack, all layers of hardware and software, in order to meet their performance and power (e.g., FLOPs/W) targets. This level of integration is not possible in a closed or even partially open ecosystem. The platform must be open to enable this tight integration. We see this openness today in the Linux OS, toolchain, runtimes, frameworks, and libraries, up to the application layer. This enables rapid development and extension of software systems. However, an open hardware infrastructure was lacking, making specialization nearly impossible, especially in a research context. Openness is required to tailor your hardware platform to the applications, thereby achieving the desired performance in the power constrained environment. There have been a couple of open source hardware platforms in the past, but Moore’s Law inhibited their adoption for many reasons: general purpose processor improvements, time to market, cost, software development, etc. Furthermore, unlike Linux, previous open source hardware was entangled in the companies that created them. Mirroring the same model as Linux, RISC-V has followed a similar development path and has enjoyed significant industrial and academic adoption. Like Linux before it, the RISC-V ecosystem is in the nascent period where it can become the de facto open hardware platform of the future. The RISC-V ecosystem has the same opportunity in hardware that Linux created as a foundation for open source software. This enables the co-design of the RISC-V hardware and the entire software stack, creating a better overall solution than the closed hardware approach that is done today. RISC-V enables everyone to build what they want and need vs. buy 2022 27th IEEE European Test Symposium (ETS) - Keynote Address- 978-1-6654-6706-3/22/$31.00 ©2022 IEEE something that partially meets their requirements. As European HPC recognized in the past with Linux, Europe has the opportunity to lead the charge, creating a full stack solution for everything from supercomputers to IoT devices, all based on an open ISA, providing interoperability and a freedom to create, build, and deploy superior technology based on European IP. In this talk, first, we will provide background on HPC computing and the research we have conducted to shape the current state of the art in HPC. Using RISC-V as an instrument, we provide a vision for the future and a collection of current research and innovation projects, infrastructure, and the community that are building the foundation for the future. This is a new opportunity for Europe to lead the way to an HPC Future that is Wide Open!
dc.format.extent2 p.
dc.language.isoeng
dc.rightsAttribution-NonCommercial-NoDerivatives 4.0 International
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/4.0/
dc.subjectÀrees temàtiques de la UPC::Enginyeria electrònica::Microelectrònica
dc.subject.lcshMicroelectronics
dc.subject.lcshIntegrated circuits
dc.subject.lcshSpintronics
dc.titleK1 - Supercomputers and European Sovereignty ...
dc.typeConference report
dc.subject.lemacMicroelectrònica
dc.subject.lemacCircuits integrats
dc.subject.lemacEspintrònica
dc.rights.accessOpen Access
local.citation.contributor27th IEEE European Test Symposium (ETS)


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