Show simple item record

dc.contributor.authorFieback, Moritz
dc.contributor.authorMünch, Christopher
dc.contributor.authorGebregiorgis, Anteneh
dc.contributor.authorCardoso Medeiros, Guilherme
dc.contributor.authorTaouil, Mottaqiallah
dc.contributor.authorHamdioui, Said
dc.contributor.authorTahoori, Mehdi
dc.date.accessioned2022-07-08T08:41:00Z
dc.date.issued2022-05
dc.identifier.citationFieback, M. [et al.]. S8 - PVT Analysis for RRAM and STT-MRAM-based Logic Computation-in-Memory. A: 27th IEEE European Test Symposium (ETS). 2022,
dc.identifier.urihttp://hdl.handle.net/2117/372160
dc.description.abstractEmerging non-volatile resistive memories like Spin- Transfer Torque Magnetic Random Access Memory (STTMRAM) and Resistive RAM (RRAM) are in the focus of today’s research. They offer promising alternative computing architectures such as computation-in-memory (CiM) to reduce the transfer overhead between CPU and memory, usually referred to as the memory wall, which is present in all von Neumann architectures. A multitude of architectures with CiM capabilities are based on these devices, due to their inherent resistive behavior and thus their ability to perform calculation directly within the memory, and thus without invoking the CPU at all. However, emerging memories are sensitive to Process, Voltage and Temperature (PVT) variations. This sensitivity has an even larger impact on CiM architectures. In this paper, we analyze and compare the impact of PVT variations on STT-MRAM and RRAM-based CiM architectures. We perform a sensitivity analysis to identify which parts of the CiM structure are most susceptible to PVT variations, for each technology. Based on these analyses, we recommend that STT-MRAM is used in highperformance CiM, while RRAM is used for edge CiM.
dc.format.extent6 p.
dc.language.isoeng
dc.rightsAttribution-NonCommercial-NoDerivatives 4.0 International
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/4.0/
dc.subjectÀrees temàtiques de la UPC::Enginyeria electrònica::Microelectrònica
dc.subject.lcshMicroelectronics
dc.subject.lcshIntegrated circuits
dc.subject.lcshSpintronics
dc.subject.otherComputation-in-Memory (CiM)
dc.subject.otherPVT
dc.subject.otherEmerging memories
dc.subject.otherSTT-MRAM
dc.subject.otherRRAM
dc.subject.otherReliability
dc.titleS8 - PVT Analysis for RRAM and STT-MRAM-based Logic Computation-in-Memory
dc.typeConference report
dc.subject.lemacMicroelectrònica
dc.subject.lemacCircuits integrats
dc.subject.lemacEspintrònica
dc.relation.publisherversionhttps://ieeexplore.ieee.org/xpl/conhome/9810327/proceeding
dc.rights.accessRestricted access - publisher's policy
dc.date.lift10000-01-01
local.citation.contributor27th IEEE European Test Symposium (ETS)


Files in this item

Thumbnail

This item appears in the following Collection(s)

Show simple item record