S5 - SPINALFUZZ: Coverage-Guided Fuzzing for SpinalHDL Designs
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hdl:2117/372151
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Data publicació2022-05
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Abstract
Boosting hardware design productivity is a major
plus of SpinalHDL, a Scala-based Hardware Description
Language (HDL). SpinalHDL achieves this by providing object
oriented programming, functional programming, and metahardware
description finally enabling the generation of Verilog
code. Despite all the advantages of SpinalHDL, verification is the
biggest challenge here as well.
In this paper, we bring Coverage-Guided Fuzzing (CGF), a wellestablished
software testing technique, to the SpinalHDL design
flow. We have implemented our approach SPINALFUZZ on top
of the fuzzer AFL++. We leverage Scala-features to automate as
many tasks as possible and ease the integration of fuzzing in
SpinalHDL. In the experiments we demonstrate the effectiveness
of SPINALFUZZ in comparison to Constrained Random Verification
(CRV). For a wide range of SpinalHDL designs we show that
SPINALFUZZ outperforms CRV and reaches coverage-closure.
CitacióRuep, K.; Große, D. S5 - SPINALFUZZ: Coverage-Guided Fuzzing for SpinalHDL Designs. A: 27th IEEE European Test Symposium (ETS). 2022,
Versió de l'editorhttps://ieeexplore.ieee.org/xpl/conhome/9810327/proceeding
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