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dc.contributor.authorMrugalski, Grzegorz
dc.contributor.authorRajski, Janusz
dc.contributor.authorTyszer, Jerzy
dc.contributor.authorWłodarczak, Bartosz
dc.date.accessioned2022-07-08T08:22:00Z
dc.date.issued2022-05
dc.identifier.citationMrugalski, G. [et al.]. S1 - X-Masking for In-System Deterministic Test. A: 27th IEEE European Test Symposium (ETS). 2022,
dc.identifier.urihttp://hdl.handle.net/2117/372136
dc.description.abstractIn-system deterministic tests are used in safetysensitive designs to assure high test coverage, short test time, and low data volume, typically through an input-streaming-only approach that allows a quick test delivery. The output side of the same scheme is, however, inherently vulnerable to unknown (X) states whose sources vary from uninitialized memory elements to the last-minute timing violations. Typically, X values degrade test results and thus test response compaction requires some form of protection. This paper presents two X-masking schemes that complement the primary (or level-A) blocking of unknown values by filtering out those X states that escape the first stage of masking and shall not reach a test response compactor or test result sticky-bits deployed by the on-chip compare framework. Experimental results obtained for eleven industrial designs show feasibility and efficiency of the proposed schemes altogether with actual impact of X-masking on various test-related statistics.
dc.format.extent6 p.
dc.language.isoeng
dc.rightsAttribution-NonCommercial-NoDerivatives 4.0 International
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/4.0/
dc.subjectÀrees temàtiques de la UPC::Enginyeria electrònica::Microelectrònica
dc.subject.lcshMicroelectronics
dc.subject.lcshIntegrated circuits
dc.subject.lcshSpintronics
dc.subject.otherEmbedded-test
dc.subject.otherIn-system test
dc.subject.otherScan-based testing
dc.subject.otherTest compression
dc.subject.otherUnknown states
dc.subject.otherX-masking
dc.titleS1 - X-Masking for In-System Deterministic Test
dc.typeConference report
dc.subject.lemacMicroelectrònica
dc.subject.lemacCircuits integrats
dc.subject.lemacEspintrònica
dc.relation.publisherversionhttps://ieeexplore.ieee.org/xpl/conhome/9810327/proceeding
dc.rights.accessRestricted access - publisher's policy
dc.date.lift10000-01-01
local.citation.contributor27th IEEE European Test Symposium (ETS)


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