dc.contributor.author | Ahmed, Soyed Tuhin |
dc.contributor.author | Mayahinia, Mahta |
dc.contributor.author | Hefenbrock, Michael |
dc.contributor.author | Münch, Christopher |
dc.contributor.author | Tahoori, Mehdi B. |
dc.date.accessioned | 2022-07-08T08:20:00Z |
dc.date.available | 2022-09-01T08:07:22Z |
dc.date.issued | 2022-05 |
dc.identifier.citation | Ahmed, S.T. [et al.]. POS2 - Process and Runtime Variation Robustness for Spintronic-Based Neuromorphic Fabric. A: 27th IEEE European Test Symposium (ETS). 2022, |
dc.identifier.uri | http://hdl.handle.net/2117/372130 |
dc.description.abstract | Neural Networks (NN) can be efficiently accelerated
using emerging resistive non-volatile memories (eNVM), such as
Spin Transfer Torque Magnetic RAM(STT-MRAM). However,
process variations and runtime temperature fluctuations can lead
to miss-quantizing the sensed state and in turn, degradation of
inference accuracy. We propose a design-time reference current
generation method to improve the robustness of the implemented
NN under different thermal and process variation scenarios with
no additional runtime hardware overhead compared to existing
solutions. |
dc.format.extent | 2 p. |
dc.language.iso | eng |
dc.rights | Attribution-NonCommercial-NoDerivatives 4.0 International |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/4.0/ |
dc.subject | Àrees temàtiques de la UPC::Enginyeria electrònica::Microelectrònica |
dc.subject.lcsh | Microelectronics |
dc.subject.lcsh | Integrated circuits |
dc.subject.lcsh | Spintronics |
dc.title | POS2 - Process and Runtime Variation Robustness for Spintronic-Based Neuromorphic Fabric |
dc.type | Conference report |
dc.subject.lemac | Microelectrònica |
dc.subject.lemac | Circuits integrats |
dc.subject.lemac | Espintrònica |
dc.relation.publisherversion | https://ieeexplore.ieee.org/xpl/conhome/9810327/proceeding |
dc.rights.access | Restricted access - publisher's policy |
local.citation.contributor | 27th IEEE European Test Symposium (ETS) |