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dc.contributor.authorInglese, Pietro
dc.contributor.authorVatajelu, Elena Ioana
dc.contributor.authorNatale, Giorgio Di
dc.date.accessioned2022-07-12T09:27:29Z
dc.date.issued2022-05
dc.identifier.citationInglese, P.; Vatajelu, E.I.; Natale, G.D. Analysis and Simulation of Logic-In-Memory Operations. A: 27th IEEE European Test Symposium (ETS). 2022,
dc.identifier.urihttp://hdl.handle.net/2117/369992
dc.description.abstractThe technology evolution has tried to address the demand for faster computers. Despite the achieved speed-up in terms of memory and computation performances, the communication between the memories and the processor remains a bottleneck. The Computation in-Memory (CIM) aims to solve this problem by moving the computation directly inside the memory. This study focuses on the Logic-In-Memory (LIM), which represents the applications that accelerate Boolean Logic. This paper introduces the analysis of selected Logic-In-Memory operations simulated under various operating conditions. This is the preliminary step to study the behavior of LIM for security applications.
dc.format.extent2 p.
dc.language.isoeng
dc.rightsAttribution-NonCommercial-NoDerivatives 4.0 International
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/4.0/
dc.subjectÀrees temàtiques de la UPC::Enginyeria electrònica::Microelectrònica
dc.subject.lcshMicroelectronics
dc.subject.lcshIntegrated circuits
dc.subject.lcshSpinitronics
dc.subject.otherEmerging technologies
dc.subject.otherLogic-In-Memory
dc.subject.otherMemristors
dc.subject.otherNon-Volatile memories
dc.titlePFS - Analysis and Simulation of Logic-In-Memory Operations
dc.typeConference report
dc.subject.lemacMicroelectrònica
dc.subject.lemacCircuits integrats
dc.subject.lemacEspintrònica
dc.relation.publisherversionhttps://ieeexplore.ieee.org/xpl/conhome/9810327/proceeding
dc.rights.accessRestricted access - publisher's policy
dc.date.lift10000-01-01
local.citation.contributor27th IEEE European Test Symposium (ETS)


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