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PFS - Improving the Design for Testability of Integrated Circuits Using Formal Methods and AI Techniques
dc.contributor.author | Habiby, Payam |
dc.date.accessioned | 2022-07-12T09:17:01Z |
dc.date.issued | 2022-05 |
dc.identifier.citation | Habiby, P. Improving the Design for Testability of Integrated Circuits Using Formal Methods and AI Techniques. A: 27th IEEE European Test Symposium (ETS). 2022, |
dc.identifier.uri | http://hdl.handle.net/2117/369985 |
dc.format.extent | 2 p. |
dc.language.iso | eng |
dc.rights | Attribution-NonCommercial-NoDerivatives 4.0 International |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/4.0/ |
dc.subject | Àrees temàtiques de la UPC::Enginyeria electrònica::Microelectrònica |
dc.subject.lcsh | Microelectronics |
dc.subject.lcsh | Integrated circuits |
dc.subject.lcsh | Spinitronics |
dc.title | PFS - Improving the Design for Testability of Integrated Circuits Using Formal Methods and AI Techniques |
dc.type | Conference report |
dc.subject.lemac | Microelectrònica |
dc.subject.lemac | Circuits integrats |
dc.subject.lemac | Espintrònica |
dc.relation.publisherversion | https://ieeexplore.ieee.org/xpl/conhome/9810327/proceeding |
dc.rights.access | Restricted access - publisher's policy |
dc.date.lift | 10000-01-01 |
local.citation.contributor | 27th IEEE European Test Symposium (ETS) |